JPS5730425A - Channel selector - Google Patents

Channel selector

Info

Publication number
JPS5730425A
JPS5730425A JP10546180A JP10546180A JPS5730425A JP S5730425 A JPS5730425 A JP S5730425A JP 10546180 A JP10546180 A JP 10546180A JP 10546180 A JP10546180 A JP 10546180A JP S5730425 A JPS5730425 A JP S5730425A
Authority
JP
Japan
Prior art keywords
frequency
local oscillator
oscillation
prescaler
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10546180A
Other languages
Japanese (ja)
Inventor
Akio Hashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10546180A priority Critical patent/JPS5730425A/en
Publication of JPS5730425A publication Critical patent/JPS5730425A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

PURPOSE:To apply a PLL frequency synthesizer system with a simple constitution, by obtaining the frequency difference between the oscillation frequency of the 1st local oscillator and that of the 2nd local oscillator and taking this as the input signal to the prescaler. CONSTITUTION:The 1st intermediate frequency is fixed and the selection of the reception signal is made by controlling the oscillation frequency of the 1st local oscillator 23. The signal is converted to the 2nd intermediate frequency taking the frequency difference with the oscillation frequency of the 2nd local oscillator 26 with the 2nd frequency mixer 25 via the 1st intermediate frequency amplifier 24. In this case, the 3rd frequency mixer 28 is provided to obtain the frequency difference between the oscillation frequencies of the 1st and 2nd local oscillators 23 and 26, and it is taken as the input signal to a prescaler 2. The output of the prescaler 2 is frequency-divided with a channel selection programmable frequency divider 3 and phase comparison is made with the reference frequency at a phase comparator 4 and the output of the phase comparator 4 controls the oscillating frequency of the 1st local oscillator 23 via a low pass filter 5.
JP10546180A 1980-07-30 1980-07-30 Channel selector Pending JPS5730425A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10546180A JPS5730425A (en) 1980-07-30 1980-07-30 Channel selector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10546180A JPS5730425A (en) 1980-07-30 1980-07-30 Channel selector

Publications (1)

Publication Number Publication Date
JPS5730425A true JPS5730425A (en) 1982-02-18

Family

ID=14408212

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10546180A Pending JPS5730425A (en) 1980-07-30 1980-07-30 Channel selector

Country Status (1)

Country Link
JP (1) JPS5730425A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5783305A (en) * 1995-09-06 1998-07-21 Matsumoto Yushi-Seiyaku Co. Ltd. Finish for carbon fiber precursors

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53105925A (en) * 1977-02-28 1978-09-14 Alps Electric Co Ltd Tuner

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53105925A (en) * 1977-02-28 1978-09-14 Alps Electric Co Ltd Tuner

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5783305A (en) * 1995-09-06 1998-07-21 Matsumoto Yushi-Seiyaku Co. Ltd. Finish for carbon fiber precursors

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