JPS56115555A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS56115555A
JPS56115555A JP1813980A JP1813980A JPS56115555A JP S56115555 A JPS56115555 A JP S56115555A JP 1813980 A JP1813980 A JP 1813980A JP 1813980 A JP1813980 A JP 1813980A JP S56115555 A JPS56115555 A JP S56115555A
Authority
JP
Japan
Prior art keywords
type
region
metal
forming
input circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1813980A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6223466B2 (enrdf_load_stackoverflow
Inventor
Yoshiyuki Nakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1813980A priority Critical patent/JPS56115555A/ja
Publication of JPS56115555A publication Critical patent/JPS56115555A/ja
Publication of JPS6223466B2 publication Critical patent/JPS6223466B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/617—Combinations of vertical BJTs and only diodes

Landscapes

  • Element Separation (AREA)
  • Bipolar Integrated Circuits (AREA)
JP1813980A 1980-02-16 1980-02-16 Semiconductor integrated circuit device Granted JPS56115555A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1813980A JPS56115555A (en) 1980-02-16 1980-02-16 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1813980A JPS56115555A (en) 1980-02-16 1980-02-16 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS56115555A true JPS56115555A (en) 1981-09-10
JPS6223466B2 JPS6223466B2 (enrdf_load_stackoverflow) 1987-05-22

Family

ID=11963262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1813980A Granted JPS56115555A (en) 1980-02-16 1980-02-16 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS56115555A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02102605U (enrdf_load_stackoverflow) * 1989-02-02 1990-08-15
JPH02224378A (ja) * 1989-02-27 1990-09-06 Hamamatsu Photonics Kk 発光素子

Also Published As

Publication number Publication date
JPS6223466B2 (enrdf_load_stackoverflow) 1987-05-22

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