JPS56112122A - Decoder circuit - Google Patents

Decoder circuit

Info

Publication number
JPS56112122A
JPS56112122A JP1457680A JP1457680A JPS56112122A JP S56112122 A JPS56112122 A JP S56112122A JP 1457680 A JP1457680 A JP 1457680A JP 1457680 A JP1457680 A JP 1457680A JP S56112122 A JPS56112122 A JP S56112122A
Authority
JP
Japan
Prior art keywords
outputs
output
address signal
circuit
selective circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1457680A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6261177B2 (enExample
Inventor
Hideaki Isogai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1457680A priority Critical patent/JPS56112122A/ja
Priority to EP81300487A priority patent/EP0035326A3/en
Priority to CA000370290A priority patent/CA1150838A/en
Priority to US06/232,008 priority patent/US4369503A/en
Priority to IE237/81A priority patent/IE51987B1/en
Publication of JPS56112122A publication Critical patent/JPS56112122A/ja
Publication of JPS6261177B2 publication Critical patent/JPS6261177B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/001—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits characterised by the elements used
    • H03M7/005—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits characterised by the elements used using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Static Random-Access Memory (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP1457680A 1980-02-08 1980-02-08 Decoder circuit Granted JPS56112122A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP1457680A JPS56112122A (en) 1980-02-08 1980-02-08 Decoder circuit
EP81300487A EP0035326A3 (en) 1980-02-08 1981-02-05 Decoder circuit
CA000370290A CA1150838A (en) 1980-02-08 1981-02-06 Decoder circuit
US06/232,008 US4369503A (en) 1980-02-08 1981-02-06 Decoder circuit
IE237/81A IE51987B1 (en) 1980-02-08 1981-02-06 Decoder circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1457680A JPS56112122A (en) 1980-02-08 1980-02-08 Decoder circuit

Publications (2)

Publication Number Publication Date
JPS56112122A true JPS56112122A (en) 1981-09-04
JPS6261177B2 JPS6261177B2 (enExample) 1987-12-19

Family

ID=11864981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1457680A Granted JPS56112122A (en) 1980-02-08 1980-02-08 Decoder circuit

Country Status (5)

Country Link
US (1) US4369503A (enExample)
EP (1) EP0035326A3 (enExample)
JP (1) JPS56112122A (enExample)
CA (1) CA1150838A (enExample)
IE (1) IE51987B1 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60254484A (ja) * 1984-05-31 1985-12-16 Fujitsu Ltd ２段デコーダ回路
JPH01285090A (ja) * 1988-05-11 1989-11-16 Nippon Telegr & Teleph Corp <Ntt> バイポーラｃｍｏｓ番地選択回路
JPH02128398A (ja) * 1988-10-28 1990-05-16 Internatl Business Mach Corp <Ibm> ２段アドレス・デコーダ回路

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592291A (ja) * 1982-06-28 1984-01-07 Fujitsu Ltd プログラマブル・リ−ドオンリ・メモリ装置
JPS5960794A (ja) * 1982-09-29 1984-04-06 Fujitsu Ltd ダイナミツク型半導体記憶装置
JPS5990291A (ja) * 1982-11-16 1984-05-24 Nec Corp メモリ
JPS59124092A (ja) * 1982-12-29 1984-07-18 Fujitsu Ltd メモリ装置
US4660178A (en) * 1983-09-21 1987-04-21 Inmos Corporation Multistage decoding
US4613774A (en) * 1984-07-09 1986-09-23 Advanced Micro Devices, Inc. Unitary multiplexer-decoder circuit
EP0176909B1 (de) * 1984-09-24 1989-12-27 Siemens Aktiengesellschaft UND-Gatter für ECL-Schaltungen
EP0176908B1 (de) * 1984-09-24 1990-01-24 Siemens Aktiengesellschaft UND-Gatter für ECL-Schaltungen
US4633220A (en) * 1984-11-29 1986-12-30 American Microsystems, Inc. Decoder using pass-transistor networks
FR2580420B1 (fr) * 1985-04-16 1991-05-31 Radiotechnique Compelec Decodeur a diodes notamment utilisable dans une memoire bipolaire
JPS6453395A (en) * 1987-08-25 1989-03-01 Mitsubishi Electric Corp Semiconductor memory device
JPH0250621A (ja) * 1988-08-12 1990-02-20 Toshiba Corp 論理回路
JPH02107267U (enExample) * 1989-02-13 1990-08-27
JP2504571B2 (ja) * 1989-08-04 1996-06-05 富士通株式会社 半導体集積回路装置
US5402386A (en) * 1992-10-14 1995-03-28 Sun Microsystems, Inc. Word line decoder/driver circuit and method
EP2492668B1 (en) * 2011-02-28 2013-08-28 C.R.F. Società Consortile per Azioni System and method for monitoring painting quality of components, in particular of motor-vehicle bodies

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53120233A (en) * 1977-03-30 1978-10-20 Toshiba Corp Address decoder
JPS5419339A (en) * 1977-07-08 1979-02-14 Motorola Inc Logic circuit for unifying double function inputs

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3736574A (en) * 1971-12-30 1973-05-29 Ibm Pseudo-hierarchy memory system
US4027285A (en) * 1973-12-26 1977-05-31 Motorola, Inc. Decode circuitry for bipolar random access memory
US4007451A (en) * 1975-05-30 1977-02-08 International Business Machines Corporation Method and circuit arrangement for operating a highly integrated monolithic information store
DE2658523A1 (de) * 1976-12-23 1978-06-29 Siemens Ag Halbleiterspeicher
DE2904457C3 (de) * 1979-02-06 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Adressdecoder
JPS5833634B2 (ja) * 1979-02-28 1983-07-21 富士通株式会社 メモリセルアレイの駆動方式
JPS5631137A (en) * 1979-08-22 1981-03-28 Fujitsu Ltd Decoder circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53120233A (en) * 1977-03-30 1978-10-20 Toshiba Corp Address decoder
JPS5419339A (en) * 1977-07-08 1979-02-14 Motorola Inc Logic circuit for unifying double function inputs

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60254484A (ja) * 1984-05-31 1985-12-16 Fujitsu Ltd ２段デコーダ回路
JPH01285090A (ja) * 1988-05-11 1989-11-16 Nippon Telegr & Teleph Corp <Ntt> バイポーラｃｍｏｓ番地選択回路
JPH02128398A (ja) * 1988-10-28 1990-05-16 Internatl Business Mach Corp <Ibm> ２段アドレス・デコーダ回路

Also Published As

Publication number Publication date
EP0035326A2 (en) 1981-09-09
EP0035326A3 (en) 1981-09-23
CA1150838A (en) 1983-07-26
IE51987B1 (en) 1987-05-13
JPS6261177B2 (enExample) 1987-12-19
IE810237L (en) 1981-08-08
US4369503A (en) 1983-01-18

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