JPS56107175A - Confirmation method for connection of check pins on integrated circuit - Google Patents

Confirmation method for connection of check pins on integrated circuit

Info

Publication number
JPS56107175A
JPS56107175A JP1135980A JP1135980A JPS56107175A JP S56107175 A JPS56107175 A JP S56107175A JP 1135980 A JP1135980 A JP 1135980A JP 1135980 A JP1135980 A JP 1135980A JP S56107175 A JPS56107175 A JP S56107175A
Authority
JP
Japan
Prior art keywords
pin
check
power supply
terminal
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1135980A
Other languages
Japanese (ja)
Inventor
Takanori Nagamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1135980A priority Critical patent/JPS56107175A/en
Publication of JPS56107175A publication Critical patent/JPS56107175A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To carry out tests on an integrated circuit in simple and smooth manner by connecting a power supply terminal for C-MOSLSI to earth and deciding if a check pin and a check terminal are contacted satisfactorily with each other by a potential on the check pin connected to a prearranged power supply. CONSTITUTION:If a power supply terminal for MOS transistor T1 forming LSI is connected to earth, a check pin P to which a power supply voltage is applied is connected to a check terminal IT and an electric current runs resulting in a drop in the potential of the pin P. If this potential drop is detected by means of a comparator 8 for which a reference voltage is set, it is decided whether the connection of the pin P with the terminal IT is satisfactory, and a fault which occurs due to the breakage of the pin P at time of function tests, etc. is identified. Thus it is possible to carry out function tests on an integrated circuit in simple and smooth manner.
JP1135980A 1980-01-30 1980-01-30 Confirmation method for connection of check pins on integrated circuit Pending JPS56107175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1135980A JPS56107175A (en) 1980-01-30 1980-01-30 Confirmation method for connection of check pins on integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1135980A JPS56107175A (en) 1980-01-30 1980-01-30 Confirmation method for connection of check pins on integrated circuit

Publications (1)

Publication Number Publication Date
JPS56107175A true JPS56107175A (en) 1981-08-25

Family

ID=11775824

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1135980A Pending JPS56107175A (en) 1980-01-30 1980-01-30 Confirmation method for connection of check pins on integrated circuit

Country Status (1)

Country Link
JP (1) JPS56107175A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0689058A3 (en) * 1994-06-24 1997-05-21 Koninkl Philips Electronics Nv Circuit for monitoring a switching point regarding a leaking resistance
CN116338412A (en) * 2023-05-26 2023-06-27 深圳市国王科技有限公司 Test method and device for silicon controlled rectifier

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0689058A3 (en) * 1994-06-24 1997-05-21 Koninkl Philips Electronics Nv Circuit for monitoring a switching point regarding a leaking resistance
KR100366867B1 (en) * 1994-06-24 2003-08-02 지멘스 악티엔게젤샤프트 Leakage Resistance Test Circuit
CN116338412A (en) * 2023-05-26 2023-06-27 深圳市国王科技有限公司 Test method and device for silicon controlled rectifier
CN116338412B (en) * 2023-05-26 2023-08-01 深圳市国王科技有限公司 Test method and device for silicon controlled rectifier

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