JPS592355B2 - Pin connection confirmation method for integrated circuit under test in integrated circuit test equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pin connection confirmation method for an integrated circuit under test in an integrated circuit testing device, and more specifically, in an integrated circuit testing device, connecting pins of the integrated circuit under test to pin connectors of the testing device. This invention relates to a method for checking the connection between the test pulse generator and the above connection pin when the test pulse generator is inserted into the test pulse generator.

When testing an integrated circuit, the connection pins of the integrated circuit under test are inserted and connected to the pin connectors of the test equipment, and the test equipment switches the output of the test pulse generator using a switch and connects the pin connectors. Then, test pulses are sent to each connection pin of the assembled circuit under test.

At this time, if the continuity of the switch or the connection between the connection pin and the pin connector is incomplete, no test pulse will be sent to that connection pin and a sufficient test will not be performed. Prior to testing, it is necessary to check these things, but these days, as the scale of integrated circuits increases and the number of connection pins reaches about 100, it is not easy to do the above checks.

The purpose of the present invention is to easily and quickly confirm the above-mentioned pin connections, that is, the continuity of the switching device and the connection between the pin connector and the connection pins, for each connection pin, prior to the implementation of the test. It's a thing.

Next, embodiments of the present invention will be described with reference to the drawings.

The figure is a connection diagram of one embodiment of the present invention. In the figure, P
G is a test pulse generator, SW is a switch, IC is an integrated circuit under test, and CP is a connection pin for an integrated circuit/IC under test, and currently there are usually around 96 pins. C is the above connection pin CP
This is a pin connector provided correspondingly. The switch SW can be composed of a coaxial switch or a tree connection of relay contacts. F. To test the integrated circuit IC under test, first insert the connecting pin Cp into the corresponding pin connector C.

Activate the switch SW to connect the output of the test pulse generator PG to the first pin connector C, send a predetermined test pulse from the first pin connector to the corresponding first connection pin, Test the connection pin. Next, switch the switch SW to the second, third, etc. pin connectors, and
. . . and all the connection pins are tested to complete the test of the integrated circuit under test 1C. Prior to carrying out the above test, according to the present invention, it is confirmed that the output of the test pulse generator PG is connected to the connection pin CP of the integrated circuit under test. Generally, when a voltage is applied to one connection pin of an integrated circuit, a certain amount of current flows. For this confirmation, the output of the test pulse generator PG is set to a constant DC voltage. For this purpose, the test pulse generator PG is configured in this manner. However, it is also possible to switch to another power source. Activate the switch SW to connect the output (constant DC voltage) of the test pulse generator PG to the first pin connector C.

The output of the test pulse generator PG is branched and led to the voltage monitoring device VM via a high resistance R. If the connection between the pin connector C and the connecting pin inserted therein is complete, a certain amount of current flows into the integrated circuit under test 1C via the switching switch SW and the connecting pin, and therefore the test pulse The output voltage of the generator PG drops. This voltage is monitored by the voltage monitoring device VM, and when a voltage lower than the DC voltage set in the test pulse generator PG is detected, the pin connection is complete and the switch S
It is confirmed that the above current path in W is completely conducting. If the pin connection or the continuity of the switch SW is poor, the above DC current will not flow from the output of the test pulse generator PG, so no voltage drop will occur and the voltage monitoring unit VM
In this case, the same voltage as the DC voltage set in the test pulse generator PG is detected.

The above operation is performed for all the connection pins by sequentially switching the switch SW as in the case of the test.

The present invention is configured as described above, and prior to testing the integrated circuit under test, the connection between the connection pins and the test equipment can be confirmed in a short time by simple operation.
This has the effect of improving the efficiency of integrated circuit testing.

[Brief explanation of drawings]

The figure is a block diagram of one embodiment of the present invention.

Claims (1)

[Claims] 1. In an integrated circuit testing device equipped with a test pulse generator and a plurality of pin connectors into which connection pins of the integrated circuit under test are inserted, the output of the test pulse generator is connected to one of the pin connectors. A voltage monitoring section is provided which is connected to the output section of the test pulse generator via a resistor. A pin connection confirmation method for an integrated circuit under test in an integrated circuit testing apparatus, characterized in that the DC voltage set at the output of a generator is checked by comparing it with the voltage at the monitoring section.