JPS6423172A - Inspecting method for semiconductor integrated circuit device - Google Patents

Inspecting method for semiconductor integrated circuit device

Info

Publication number
JPS6423172A
JPS6423172A JP62179745A JP17974587A JPS6423172A JP S6423172 A JPS6423172 A JP S6423172A JP 62179745 A JP62179745 A JP 62179745A JP 17974587 A JP17974587 A JP 17974587A JP S6423172 A JPS6423172 A JP S6423172A
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
circuit device
external terminals
inspecting method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62179745A
Other languages
Japanese (ja)
Inventor
Youichi Amita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP62179745A priority Critical patent/JPS6423172A/en
Publication of JPS6423172A publication Critical patent/JPS6423172A/en
Pending legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PURPOSE:To detect the leak current of a P-N junction in a device efficiently by dividing all external terminals of the device into two groups and connecting the external terminals so that all external terminals in each group are held at the same potential. CONSTITUTION:A DC voltage source 7 is connected to the positive power source terminal 2 of the device to be inspected and a terminal 3 connected thereto through a resistor R1 through a DC ammeter 8, and other all terminals 1, 4, 5 are connected to a specific reference potential point. Here, +0.3V and -0.3V are applied as DC voltages and currents flowing corresponding to the voltages are measured by the ammeter 8 to measure the leak current of the P-N junction.
JP62179745A 1987-07-18 1987-07-18 Inspecting method for semiconductor integrated circuit device Pending JPS6423172A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62179745A JPS6423172A (en) 1987-07-18 1987-07-18 Inspecting method for semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62179745A JPS6423172A (en) 1987-07-18 1987-07-18 Inspecting method for semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6423172A true JPS6423172A (en) 1989-01-25

Family

ID=16071124

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62179745A Pending JPS6423172A (en) 1987-07-18 1987-07-18 Inspecting method for semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6423172A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008133040A1 (en) * 2007-04-12 2008-11-06 Renesas Technology Corp. Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008133040A1 (en) * 2007-04-12 2008-11-06 Renesas Technology Corp. Semiconductor device

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