JPS5599864A - Absorbing unit for timing fluctuation - Google Patents

Absorbing unit for timing fluctuation

Info

Publication number
JPS5599864A
JPS5599864A JP678079A JP678079A JPS5599864A JP S5599864 A JPS5599864 A JP S5599864A JP 678079 A JP678079 A JP 678079A JP 678079 A JP678079 A JP 678079A JP S5599864 A JPS5599864 A JP S5599864A
Authority
JP
Japan
Prior art keywords
circuit
frequency dividing
timing
data
fed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP678079A
Other languages
English (en)
Other versions
JPS6138894B2 (ja
Inventor
Mikiro Eguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP678079A priority Critical patent/JPS5599864A/ja
Publication of JPS5599864A publication Critical patent/JPS5599864A/ja
Publication of JPS6138894B2 publication Critical patent/JPS6138894B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP678079A 1979-01-22 1979-01-22 Absorbing unit for timing fluctuation Granted JPS5599864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP678079A JPS5599864A (en) 1979-01-22 1979-01-22 Absorbing unit for timing fluctuation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP678079A JPS5599864A (en) 1979-01-22 1979-01-22 Absorbing unit for timing fluctuation

Publications (2)

Publication Number Publication Date
JPS5599864A true JPS5599864A (en) 1980-07-30
JPS6138894B2 JPS6138894B2 (ja) 1986-09-01

Family

ID=11647680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP678079A Granted JPS5599864A (en) 1979-01-22 1979-01-22 Absorbing unit for timing fluctuation

Country Status (1)

Country Link
JP (1) JPS5599864A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0213641A2 (en) * 1985-09-04 1987-03-11 Fujitsu Limited Delay time adjusting method, circuit, and system
FR2593337A1 (fr) * 1986-01-23 1987-07-24 Berlinet Denis Dispositif de synchronisation d'un signal binaire avec elimination de gigue

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0213641A2 (en) * 1985-09-04 1987-03-11 Fujitsu Limited Delay time adjusting method, circuit, and system
FR2593337A1 (fr) * 1986-01-23 1987-07-24 Berlinet Denis Dispositif de synchronisation d'un signal binaire avec elimination de gigue

Also Published As

Publication number Publication date
JPS6138894B2 (ja) 1986-09-01

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