JPS5593323A - Output buffer circuit for programmable logic array - Google Patents

Output buffer circuit for programmable logic array

Info

Publication number
JPS5593323A
JPS5593323A JP282479A JP282479A JPS5593323A JP S5593323 A JPS5593323 A JP S5593323A JP 282479 A JP282479 A JP 282479A JP 282479 A JP282479 A JP 282479A JP S5593323 A JPS5593323 A JP S5593323A
Authority
JP
Japan
Prior art keywords
output
programmable logic
buffer circuit
output buffer
constant current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP282479A
Other languages
Japanese (ja)
Inventor
Hideji Washimi
Masayuki Komon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP282479A priority Critical patent/JPS5593323A/en
Publication of JPS5593323A publication Critical patent/JPS5593323A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays

Abstract

PURPOSE:To discharge the charge stored in the wiring capacity to reduce the readout time, by providing the constant current circuit with the output gate of PLA (Programmable Logic Array). CONSTITUTION:Between the output wiring l from the OR logic matrix array OR of the output buffer circuit BUF to the output gate OG and the ground GND, the constant current circuit consisting of the npn transistor Trb is connected in series with the discharge resistor R1. Since the time when the output of the array OR changes from H to L is the time to discharge the wiring capacitor C with the constant current i, the readout time can be reduced by several tens of % with suitable set of the current i.
JP282479A 1979-01-09 1979-01-09 Output buffer circuit for programmable logic array Pending JPS5593323A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP282479A JPS5593323A (en) 1979-01-09 1979-01-09 Output buffer circuit for programmable logic array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP282479A JPS5593323A (en) 1979-01-09 1979-01-09 Output buffer circuit for programmable logic array

Publications (1)

Publication Number Publication Date
JPS5593323A true JPS5593323A (en) 1980-07-15

Family

ID=11540150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP282479A Pending JPS5593323A (en) 1979-01-09 1979-01-09 Output buffer circuit for programmable logic array

Country Status (1)

Country Link
JP (1) JPS5593323A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0232565A2 (en) * 1985-12-23 1987-08-19 Koninklijke Philips Electronics N.V. Field-programmable device with buffer between programmable circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0232565A2 (en) * 1985-12-23 1987-08-19 Koninklijke Philips Electronics N.V. Field-programmable device with buffer between programmable circuits

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