JPS5586144A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5586144A JPS5586144A JP15853878A JP15853878A JPS5586144A JP S5586144 A JPS5586144 A JP S5586144A JP 15853878 A JP15853878 A JP 15853878A JP 15853878 A JP15853878 A JP 15853878A JP S5586144 A JPS5586144 A JP S5586144A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- concave part
- metal layer
- base
- bottom face
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/642—Capacitive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Abstract
PURPOSE:To suppress the fluctuation of substrate potential and stabilize operations in an IC substrate by connecting a smoothing capacitor between a part on the substrate potential and the earth lead of the IC substrate. CONSTITUTION:Over a ceramic base 22 with a concave part on its surface, a metal layer 29 is coated from the concave part via one of the convex parts and a side face to the center of the bottom face, and also from the other convex part via a side face to the center of the bottom face, a metal layer 30 is coated, and the metal layers 29 and 30 are insulated with each other on the bottom face by an insulating layer 31. Next, in the concave part of the base 22, an IC substrate 21 is fixed, and electrodes provided on it are connected with a lead 26 and an earth lead 27 penetrating seal glass 25 provided on the convex parts by bonding wires 28. next, on the base 22, a ceramic cap 23 with a concave part on the lower face is placed via the glass 25 and a space 24 is formed over the substrate 21. By so doing, a capacitor Cext is formed between the end 29B of the metal layer 29 and the end 30B of the layer 30, and the fluctuation of the substrate potential is reduced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15853878A JPS5586144A (en) | 1978-12-25 | 1978-12-25 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15853878A JPS5586144A (en) | 1978-12-25 | 1978-12-25 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5586144A true JPS5586144A (en) | 1980-06-28 |
Family
ID=15673894
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15853878A Pending JPS5586144A (en) | 1978-12-25 | 1978-12-25 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5586144A (en) |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4646126A (en) * | 1983-10-07 | 1987-02-24 | Kabushiki Kaisha Toshiba | Semiconductor device |
US4675717A (en) * | 1984-10-09 | 1987-06-23 | American Telephone And Telegraph Company, At&T Bell Laboratories | Water-scale-integrated assembly |
US4796083A (en) * | 1987-07-02 | 1989-01-03 | Olin Corporation | Semiconductor casing |
US4949163A (en) * | 1987-04-15 | 1990-08-14 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device particularly for high speed logic operations |
US4953006A (en) * | 1989-07-27 | 1990-08-28 | Northern Telecom Limited | Packaging method and package for edge-coupled optoelectronic device |
US5043535A (en) * | 1989-03-10 | 1991-08-27 | Olin Corporation | Hermetic cerglass and cermet electronic packages |
US5134539A (en) * | 1990-12-17 | 1992-07-28 | Nchip, Inc. | Multichip module having integral decoupling capacitor |
US5214844A (en) * | 1990-12-17 | 1993-06-01 | Nchip, Inc. | Method of assembling integrated circuits to a silicon board |
US5254871A (en) * | 1988-11-08 | 1993-10-19 | Bull, S.A. | Very large scale integrated circuit package, integrated circuit carrier and resultant interconnection board |
US5274270A (en) * | 1990-12-17 | 1993-12-28 | Nchip, Inc. | Multichip module having SiO2 insulating layer |
US5666004A (en) * | 1994-09-28 | 1997-09-09 | Intel Corporation | Use of tantalum oxide capacitor on ceramic co-fired technology |
WO1998044687A1 (en) * | 1997-03-31 | 1998-10-08 | Hitachi, Ltd. | Modem using capacitive insulating barrier, insulating coupler, and integrated circuit used in the modem |
-
1978
- 1978-12-25 JP JP15853878A patent/JPS5586144A/en active Pending
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4646126A (en) * | 1983-10-07 | 1987-02-24 | Kabushiki Kaisha Toshiba | Semiconductor device |
US4675717A (en) * | 1984-10-09 | 1987-06-23 | American Telephone And Telegraph Company, At&T Bell Laboratories | Water-scale-integrated assembly |
US4949163A (en) * | 1987-04-15 | 1990-08-14 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device particularly for high speed logic operations |
US4796083A (en) * | 1987-07-02 | 1989-01-03 | Olin Corporation | Semiconductor casing |
US5254871A (en) * | 1988-11-08 | 1993-10-19 | Bull, S.A. | Very large scale integrated circuit package, integrated circuit carrier and resultant interconnection board |
US5043535A (en) * | 1989-03-10 | 1991-08-27 | Olin Corporation | Hermetic cerglass and cermet electronic packages |
US4953006A (en) * | 1989-07-27 | 1990-08-28 | Northern Telecom Limited | Packaging method and package for edge-coupled optoelectronic device |
US5134539A (en) * | 1990-12-17 | 1992-07-28 | Nchip, Inc. | Multichip module having integral decoupling capacitor |
US5214844A (en) * | 1990-12-17 | 1993-06-01 | Nchip, Inc. | Method of assembling integrated circuits to a silicon board |
US5274270A (en) * | 1990-12-17 | 1993-12-28 | Nchip, Inc. | Multichip module having SiO2 insulating layer |
US5666004A (en) * | 1994-09-28 | 1997-09-09 | Intel Corporation | Use of tantalum oxide capacitor on ceramic co-fired technology |
WO1998044687A1 (en) * | 1997-03-31 | 1998-10-08 | Hitachi, Ltd. | Modem using capacitive insulating barrier, insulating coupler, and integrated circuit used in the modem |
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