JPS5563869A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5563869A
JPS5563869A JP13803978A JP13803978A JPS5563869A JP S5563869 A JPS5563869 A JP S5563869A JP 13803978 A JP13803978 A JP 13803978A JP 13803978 A JP13803978 A JP 13803978A JP S5563869 A JPS5563869 A JP S5563869A
Authority
JP
Japan
Prior art keywords
gold
iron
lifetime
temperature
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13803978A
Other languages
Japanese (ja)
Other versions
JPS6220691B2 (en
Inventor
Hisao Hayashi
Takayoshi Mamine
Takeshi Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP13803978A priority Critical patent/JPS5563869A/en
Publication of JPS5563869A publication Critical patent/JPS5563869A/en
Publication of JPS6220691B2 publication Critical patent/JPS6220691B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/167Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thyristors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To raise the controllability and reproducibility of the lifetime of carriers and facilitate the control of temperature dependence, by providing iron, gold and/or platinum in a semiconductor layer to control the lifetime of carriers. CONSTITUTION:Iron ions are implanted at the rate of 1X10<13>cm<-3> into a GTO thyristor from its reverse side. The thyristor is then annealed at a temperature of 1000 deg.C under an atmosphere of nitrogen for 1 hour. A gold film is evaporated at a thickness of 600Angstrom on the reverse side and diffused at a temperature of 890 deg.C. The recovery time Trr of GCS with gold and iron diffused is almost constant independently of the diffusion time of the gold. The lifetime tau is affected by the gold in the main at low temperature but by the iron in the main at high temperature. Diffusing both iron and gold in a semiconductor device is preferable to flatten its forward voltage VF. Since plural kinds of killers are used, the control of the lifetime is facilitated.
JP13803978A 1978-11-09 1978-11-09 Semiconductor device Granted JPS5563869A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13803978A JPS5563869A (en) 1978-11-09 1978-11-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13803978A JPS5563869A (en) 1978-11-09 1978-11-09 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5563869A true JPS5563869A (en) 1980-05-14
JPS6220691B2 JPS6220691B2 (en) 1987-05-08

Family

ID=15212589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13803978A Granted JPS5563869A (en) 1978-11-09 1978-11-09 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5563869A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111106012A (en) * 2019-12-20 2020-05-05 电子科技大学 Method for realizing local service life control of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111106012A (en) * 2019-12-20 2020-05-05 电子科技大学 Method for realizing local service life control of semiconductor device
CN111106012B (en) * 2019-12-20 2022-05-17 电子科技大学 Method for realizing local service life control of semiconductor device

Also Published As

Publication number Publication date
JPS6220691B2 (en) 1987-05-08

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