JPS5555499A - Memory control unit - Google Patents

Memory control unit

Info

Publication number
JPS5555499A
JPS5555499A JP12760978A JP12760978A JPS5555499A JP S5555499 A JPS5555499 A JP S5555499A JP 12760978 A JP12760978 A JP 12760978A JP 12760978 A JP12760978 A JP 12760978A JP S5555499 A JPS5555499 A JP S5555499A
Authority
JP
Japan
Prior art keywords
data
error correction
circuit
correction code
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12760978A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6129024B2 (cs
Inventor
Hiroyuki Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12760978A priority Critical patent/JPS5555499A/ja
Publication of JPS5555499A publication Critical patent/JPS5555499A/ja
Publication of JPS6129024B2 publication Critical patent/JPS6129024B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP12760978A 1978-10-16 1978-10-16 Memory control unit Granted JPS5555499A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12760978A JPS5555499A (en) 1978-10-16 1978-10-16 Memory control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12760978A JPS5555499A (en) 1978-10-16 1978-10-16 Memory control unit

Publications (2)

Publication Number Publication Date
JPS5555499A true JPS5555499A (en) 1980-04-23
JPS6129024B2 JPS6129024B2 (cs) 1986-07-03

Family

ID=14964310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12760978A Granted JPS5555499A (en) 1978-10-16 1978-10-16 Memory control unit

Country Status (1)

Country Link
JP (1) JPS5555499A (cs)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62260251A (ja) * 1986-05-07 1987-11-12 Mitsubishi Electric Corp 主記憶制御装置
JPH02202655A (ja) * 1989-01-31 1990-08-10 Nec Corp 記憶装置
EP0775343A4 (en) * 1994-05-24 1997-10-22 Intel Corp METHOD AND APPARATUS FOR AUTOMATICALLY ELIMINATING ERROR MATERIAL CORRECTED BY THE ERROR CORRECTING CODE IN A MEMORY
WO2003042826A3 (en) * 2001-11-14 2004-04-22 Monolithic System Tech Inc Error correcting memory and method of operating same
FR2879337A1 (fr) * 2004-12-15 2006-06-16 St Microelectronics Sa Circuit memoire, tel que dram, comportant un mecanisme correcteur d'erreur
US7275200B2 (en) 2004-11-23 2007-09-25 Monolithic System Technology, Inc. Transparent error correcting memory that supports partial-word write
JP2014186664A (ja) * 2013-03-25 2014-10-02 Toshiba Corp 演算装置およびエラー処理方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4996639A (cs) * 1973-01-17 1974-09-12

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4996639A (cs) * 1973-01-17 1974-09-12

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62260251A (ja) * 1986-05-07 1987-11-12 Mitsubishi Electric Corp 主記憶制御装置
JPH02202655A (ja) * 1989-01-31 1990-08-10 Nec Corp 記憶装置
EP0775343A4 (en) * 1994-05-24 1997-10-22 Intel Corp METHOD AND APPARATUS FOR AUTOMATICALLY ELIMINATING ERROR MATERIAL CORRECTED BY THE ERROR CORRECTING CODE IN A MEMORY
WO2003042826A3 (en) * 2001-11-14 2004-04-22 Monolithic System Tech Inc Error correcting memory and method of operating same
US7051264B2 (en) 2001-11-14 2006-05-23 Monolithic System Technology, Inc. Error correcting memory and method of operating same
US7353438B2 (en) 2001-11-14 2008-04-01 Mosys, Inc. Transparent error correcting memory
US7275200B2 (en) 2004-11-23 2007-09-25 Monolithic System Technology, Inc. Transparent error correcting memory that supports partial-word write
US7392456B2 (en) 2004-11-23 2008-06-24 Mosys, Inc. Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory
FR2879337A1 (fr) * 2004-12-15 2006-06-16 St Microelectronics Sa Circuit memoire, tel que dram, comportant un mecanisme correcteur d'erreur
US7549109B2 (en) 2004-12-15 2009-06-16 Stmicroelectronics Sa Memory circuit, such as a DRAM, comprising an error correcting mechanism
JP2014186664A (ja) * 2013-03-25 2014-10-02 Toshiba Corp 演算装置およびエラー処理方法

Also Published As

Publication number Publication date
JPS6129024B2 (cs) 1986-07-03

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