JPS5542476A - Demodulator for single-side-band frequency-division multiple signal - Google Patents

Demodulator for single-side-band frequency-division multiple signal

Info

Publication number
JPS5542476A
JPS5542476A JP11679778A JP11679778A JPS5542476A JP S5542476 A JPS5542476 A JP S5542476A JP 11679778 A JP11679778 A JP 11679778A JP 11679778 A JP11679778 A JP 11679778A JP S5542476 A JPS5542476 A JP S5542476A
Authority
JP
Japan
Prior art keywords
outputs
subtracter
adder
division multiple
band frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11679778A
Other languages
Japanese (ja)
Other versions
JPS6021496B2 (en
Inventor
Rikio Maruta
Akira Kanemasa
Tomonori Aoyama
Fumio Mano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11679778A priority Critical patent/JPS6021496B2/en
Publication of JPS5542476A publication Critical patent/JPS5542476A/en
Publication of JPS6021496B2 publication Critical patent/JPS6021496B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J1/00—Frequency-division multiplex systems
    • H04J1/02—Details
    • H04J1/04—Frequency-transposition arrangements

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To reduce hardware in scale by reducing a multiplication value by performing an offset discrete Fourier process as to two units by using one offset discrete Fourier processing circuit and one synthesizer circuit. CONSTITUTION:To input terminals 101 and 102, and 201 and 202, the real number output and imaginary number output of one and the other N-channel single side- band frequency-division multiple signal are inputted and then supplied to 1/2 multipliers 11 and 14, where respective values are halved. Those outputs are supplied to subtracters 21 and 22 and adders 31 and 32 to perform arithmetic of the real number part and imaginary number part. Next, the outputs of subtracter 21 and adder 31 are delayed by N-word shift registers 61 and 62, and the outputs of adder 32 and subtracter 22 are processed by (-1) multiplier 40, (2-1) selectors 51 and 52 and array conversion memories 71 and 72 and then processed by adder 33 and subtracter 23 by the outputs registers 61 and 62 before being inputted to offset Fourier processing circuit 80. Then, two N-channel base bands can be obtained at output terminals 401 and 402.
JP11679778A 1978-09-21 1978-09-21 Single sideband frequency division multiplex signal demodulator Expired JPS6021496B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11679778A JPS6021496B2 (en) 1978-09-21 1978-09-21 Single sideband frequency division multiplex signal demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11679778A JPS6021496B2 (en) 1978-09-21 1978-09-21 Single sideband frequency division multiplex signal demodulator

Publications (2)

Publication Number Publication Date
JPS5542476A true JPS5542476A (en) 1980-03-25
JPS6021496B2 JPS6021496B2 (en) 1985-05-28

Family

ID=14695907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11679778A Expired JPS6021496B2 (en) 1978-09-21 1978-09-21 Single sideband frequency division multiplex signal demodulator

Country Status (1)

Country Link
JP (1) JPS6021496B2 (en)

Also Published As

Publication number Publication date
JPS6021496B2 (en) 1985-05-28

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