JPS553253A - Data transmission device - Google Patents

Data transmission device

Info

Publication number
JPS553253A
JPS553253A JP7574778A JP7574778A JPS553253A JP S553253 A JPS553253 A JP S553253A JP 7574778 A JP7574778 A JP 7574778A JP 7574778 A JP7574778 A JP 7574778A JP S553253 A JPS553253 A JP S553253A
Authority
JP
Japan
Prior art keywords
data
signals
circuit
peripheral unit
transmitted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7574778A
Other languages
Japanese (ja)
Inventor
Yoshiteru Tachibana
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7574778A priority Critical patent/JPS553253A/en
Publication of JPS553253A publication Critical patent/JPS553253A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To realize a high-reliability data transmission by arraying the data and the address to supply the data in the designated address pulse time division to transmit them through the 1st and 2nd transmission lines and then carrying out the decision for the code error via the signals under being transmitted through the two transmission lines. CONSTITUTION:For the data transmission device which designates and transmits the address from the CPU side of the computer to the side of the data peripheral unit, drivers 23 and 24 plus signal converter circuit 8 are provided at the CPU side, and receivers 33 and 34 plus signal restoration coincidence detection circuit 9 are provided at the peripheral unit side respectively. Then the addresses supplied from CPU1 plus the data corresponding the addresses are arrayed in time division via circuit 8, and the 1st signal is transmitted through 1st transmission line 6. The 1st signal is then inverted with application of the fixed delay time and transmitted via 2nd transmission line 7. These signals are recevied at receivers 33 and 34 of the peripheral unit side. And the coincidence is detected between the 1st and 2nd signals at circuit 9 after matching of the delay time and the inverse logic is obtained between the both signals.
JP7574778A 1978-06-21 1978-06-21 Data transmission device Pending JPS553253A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7574778A JPS553253A (en) 1978-06-21 1978-06-21 Data transmission device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7574778A JPS553253A (en) 1978-06-21 1978-06-21 Data transmission device

Publications (1)

Publication Number Publication Date
JPS553253A true JPS553253A (en) 1980-01-11

Family

ID=13585163

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7574778A Pending JPS553253A (en) 1978-06-21 1978-06-21 Data transmission device

Country Status (1)

Country Link
JP (1) JPS553253A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5921150A (en) * 1982-07-26 1984-02-03 Nec Corp Display control system
JPS6412633A (en) * 1987-06-17 1989-01-17 Ford Motor Co Data communication method and multiconnection system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5921150A (en) * 1982-07-26 1984-02-03 Nec Corp Display control system
JPS6412633A (en) * 1987-06-17 1989-01-17 Ford Motor Co Data communication method and multiconnection system

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