JPS5531345A - Level conversion circuit - Google Patents
Level conversion circuitInfo
- Publication number
- JPS5531345A JPS5531345A JP10465778A JP10465778A JPS5531345A JP S5531345 A JPS5531345 A JP S5531345A JP 10465778 A JP10465778 A JP 10465778A JP 10465778 A JP10465778 A JP 10465778A JP S5531345 A JPS5531345 A JP S5531345A
- Authority
- JP
- Japan
- Prior art keywords
- potential
- resistance
- input
- emitter
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01806—Interface arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To realize a high-speed driving for the internal circuit in accordance with variation of the input level from low to high levels by setting the power source side potential of the emitter resistance of the emitter follower transistor lower than the constant voltage source potential. CONSTITUTION:Transistors TrT3 of the emitter follower is connected in series to resistance R1 and constant voltage source VCC and between source VCC and ground GND. Then diodes D1-D5 are connected between the output end of the TTL circuit and the joint of source VCC and resistance R1 connected to the input end of the emitter combined logic ECL circuit consisting of TrT1 and T2. Here the base of TrT3 is set higher than the input potential within the ECL circuit and also connected to point B featuring the high and low level change along with the input potential. As a result, a high-speed driving is given to the internal circuit in accordance with the variation of the high and low levels.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10465778A JPS5531345A (en) | 1978-08-28 | 1978-08-28 | Level conversion circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10465778A JPS5531345A (en) | 1978-08-28 | 1978-08-28 | Level conversion circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5531345A true JPS5531345A (en) | 1980-03-05 |
JPH0219651B2 JPH0219651B2 (en) | 1990-05-02 |
Family
ID=14386526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10465778A Granted JPS5531345A (en) | 1978-08-28 | 1978-08-28 | Level conversion circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5531345A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115932A (en) * | 1981-12-28 | 1983-07-09 | Fujitsu Ltd | Level converting circuit |
JPS58177032A (en) * | 1982-04-08 | 1983-10-17 | Fujitsu Ltd | Level converting circuit |
JPS62104314A (en) * | 1985-10-31 | 1987-05-14 | Nec Corp | Level converting circuit |
JPS62230223A (en) * | 1986-03-31 | 1987-10-08 | Toshiba Corp | Output circuit |
JPS62263721A (en) * | 1986-05-09 | 1987-11-16 | Mitsubishi Electric Corp | D-a converter |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49108952A (en) * | 1973-02-16 | 1974-10-16 |
-
1978
- 1978-08-28 JP JP10465778A patent/JPS5531345A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49108952A (en) * | 1973-02-16 | 1974-10-16 |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58115932A (en) * | 1981-12-28 | 1983-07-09 | Fujitsu Ltd | Level converting circuit |
JPH0363254B2 (en) * | 1981-12-28 | 1991-09-30 | Fujitsu Ltd | |
JPS58177032A (en) * | 1982-04-08 | 1983-10-17 | Fujitsu Ltd | Level converting circuit |
JPH0427732B2 (en) * | 1982-04-08 | 1992-05-12 | Fujitsu Ltd | |
JPS62104314A (en) * | 1985-10-31 | 1987-05-14 | Nec Corp | Level converting circuit |
JPS62230223A (en) * | 1986-03-31 | 1987-10-08 | Toshiba Corp | Output circuit |
JPH0573292B2 (en) * | 1986-03-31 | 1993-10-14 | Tokyo Shibaura Electric Co | |
JPS62263721A (en) * | 1986-05-09 | 1987-11-16 | Mitsubishi Electric Corp | D-a converter |
Also Published As
Publication number | Publication date |
---|---|
JPH0219651B2 (en) | 1990-05-02 |
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