JPS62263721A - D-a converter - Google Patents

Abstract

PURPOSE:To attain the normal operation regardless of the quantity of an input voltage by connecting a resistor and a diode to an input terminal of a D-A converter. CONSTITUTION:The clamp voltage is adjusted by number of diodes 24-29 so that transistors (TRs) 2-6 are not saturated by the combination between voltages at terminals 21-23 and clamp voltages of diodes 24-29. When a voltage inputted to input terminals 17-19 is over the power voltage, the current is controlled by a resistor 30 and the voltage is clamped by the diodes 24, 25. Since the input TR 2 of a differential amplifier is operated normally without being saturated, a normal voltage is generated at a node 21 and a voltage subject to normal D-A conversion is outputted at an output terminal 20.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a DA converter, and more particularly to a DA converter that can operate normally regardless of the magnitude of the voltage of a digital input signal.

[Conventional technology]

FIG. 2 shows the circuit configuration of a conventional DA converter.

In FIG. 2, 1, 3.5, and 2.4.6 are first and second NPN differential transistors that constitute differential amplifiers 40 to 42, and 7 to 12 are R transistors that perform D-A conversion. -2R ladder resistor, and the resistors 7 to 12 constitute a ladder resistor network 50.

The first resistor 7,9.12 has a resistance value of 2R, and the second resistor 7,9.12 has a resistance value of 2R.
The resistors 8, 10.11 each have a resistance value of R. Further, 13 to 15 are constant current sources of a differential amplifier that determine the level of the DA conversion output, and the current value is the same for each constant current source. 16 is the reference power supply for the differential amplifier (1i pressure value ■).

), 17 to 19 are the input terminals of the D-A converter, and 17 is the L
The SB input terminal 19 is the MSB input terminal. Further, 20 is an output terminal of the DA converter, and 21 to 23 are output nodes of the differential amplifier.

Next, the operation will be explained. Input terminal 1 of D-A converter
Digital signals are input to 7-19. Assuming that only input terminal 17 is at high level, the voltage of that signal causes transistor 1.2, resistor 7. A differential amplifier 40 composed of a constant current source 13 is operated. In other words, the constant currents of the constant current sources whose input terminal voltages are larger than the reference voltage 1 are shunted to the resistors 7 to 12, respectively, to the nodes 21 and 2.
A voltage is generated at 2.23, and the voltage is DA converted by the R-2R ladder resistors 7 to 12.

In the D-A converter of this system, the number of bits of the input digital signal can be increased by increasing the number of blocks A as shown in FIG.

[Problem that the invention seeks to solve]

Conventional D-A converters are configured as described above, and when the power supply voltage (V CC ) is low and the output dynamic range is wide, the signal voltage input to input terminals 17 to 19 must be higher than or equal to the power supply voltage. In this case, the transistors 2, 4, and 6 constituting the differential amplifier are saturated, and a normal -A converter output cannot be obtained.

This invention was made in order to solve the conventional problems as described above, and it is possible to obtain a normal -A converter output even if the input signal voltage is at a level higher than the power supply voltage.
The purpose is to obtain a converter.

[Means for solving problems]

The DA converter according to the present invention has a third resistor placed between the base of the first differential transistor of the differential amplifier constituting the D, A converter and the digital input terminal.

[Effect]

In this invention, a third resistor and a clamp diode are provided, and when a digital input signal with a voltage higher than the first power supply voltage is input, the resistor limits the current and the diode clamps the current. As a result, saturation of the first differential transistor due to the digital input signal is prevented and a normal -A converter is obtained.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a D-A converter according to an embodiment of the present invention,
In the figure, the same reference numerals as in Figure 2 indicate the same thing, 2
4 to 29 are diodes that clamp the input voltage; 30 to 29 are diodes that clamp the input voltage;
33 is for controlling the current of diodes 24 to 29;
This is the resistance of FPiJ3.

Next, the operation will be explained. In this embodiment, terminals 21 to 2
3 voltage and the clamp voltage of the diodes 24 to 29, the clamp voltage is adjusted by the number of diodes 24 to 290 so that the transistors 2 to 6 are not saturated. When the input voltage is higher than the power supply voltage, the resistor 30 controls the current, and the diodes 24 and 25 clamp the voltage. Therefore, the input transistor 2 of the differential amplifier operates normally without becoming saturated, so that a normal voltage is generated at the node 21. Therefore, a normal -A converted voltage is output to the output terminal 20.

[Effects of the Invention] As described above, the D-A converter according to the present invention can operate normally regardless of the magnitude of the input voltage by using a resistor and a diode at the input terminal of the D-A converter. The effect is that it can be done.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a DA converter according to an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional DA converter. 2.4.6...First differential transistor, 1.3°5
...Second differential transistor, 7, 8, 9, 10°1
1.12,30,31.32...resistance, 13,14.
15... Constant current source, 16... Reference power supply, 17, 18
．． 19...Input terminal, 20...Output terminal, 21.2
2.23... Output terminal of differential amplifier, 24, 25°2
6.27, 28.29...Diode, 40-42.
...Differential amplifier, 50...Ladder resistor network.

Claims (1)

[Claims] (1) A first resistor constituting an R-2R ladder resistor network is connected between the collector of the first differential transistor and the first power supply, and its emitter is connected to the emitter of the second differential transistor. differential amplification for the number of input bits, which is commonly connected, a constant current source is connected between this common emitter and a second power supply, and the collector of the second differential transistor is connected to the first power supply. a reference power supply connected between each base of the second differential transistor and the second power supply; a digital input terminal connected to each base of the second differential transistor; a second resistor constituting the ladder resistor network connected between each connection point between the collector of the first differential transistor of the amplifier and the first resistor; and a digital signal of the most significant bit. The output terminal taken out from the connection point between the collector of the first differential transistor of the input differential amplifier and the first resistor, the digital input terminal of each differential amplifier and the first differential A third resistor corresponding to the number of input bits is inserted between the bases of the transistors, and a clamp diode is connected between the base of the first differential transistor of each differential amplifier and the second power supply. A D-A converter comprising: