JPS5531309A - Data transmission system - Google Patents

Data transmission system

Info

Publication number
JPS5531309A
JPS5531309A JP10395178A JP10395178A JPS5531309A JP S5531309 A JPS5531309 A JP S5531309A JP 10395178 A JP10395178 A JP 10395178A JP 10395178 A JP10395178 A JP 10395178A JP S5531309 A JPS5531309 A JP S5531309A
Authority
JP
Japan
Prior art keywords
transmission line
control signal
input
lines
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10395178A
Other languages
Japanese (ja)
Inventor
Kazutomi Sumi
Yusaku Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10395178A priority Critical patent/JPS5531309A/en
Publication of JPS5531309A publication Critical patent/JPS5531309A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks

Abstract

PURPOSE:To eliminate the effect of the noise and the diconection with a reduced number of the control signal lines and by combining the selection transmission lines forming a matrix when the data is transmitted between the central processor and several units of the data input/output units which are dotted on the common bus transmission line. CONSTITUTION:One of input/output units 14a 14i is selected via gate control signal transmission line 15 formed with digital output interface devices 12a and 12b. And then, for example, unit 14a is selected via lines (a) of devices 12a and 12b. The selected input/output unit performs the data transfer to processor 10 via common bus transmission line plus interface devices 11a and 11b. As the gate control signal transmission line features the matrix structure, the occurrence can be reduced for both malfunction and disconnection.
JP10395178A 1978-08-28 1978-08-28 Data transmission system Pending JPS5531309A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10395178A JPS5531309A (en) 1978-08-28 1978-08-28 Data transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10395178A JPS5531309A (en) 1978-08-28 1978-08-28 Data transmission system

Publications (1)

Publication Number Publication Date
JPS5531309A true JPS5531309A (en) 1980-03-05

Family

ID=14367718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10395178A Pending JPS5531309A (en) 1978-08-28 1978-08-28 Data transmission system

Country Status (1)

Country Link
JP (1) JPS5531309A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120934A (en) * 1974-03-11 1975-09-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120934A (en) * 1974-03-11 1975-09-22

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