JPS55156344A - Connection of semiconductor device - Google Patents

Connection of semiconductor device

Info

Publication number
JPS55156344A
JPS55156344A JP6322179A JP6322179A JPS55156344A JP S55156344 A JPS55156344 A JP S55156344A JP 6322179 A JP6322179 A JP 6322179A JP 6322179 A JP6322179 A JP 6322179A JP S55156344 A JPS55156344 A JP S55156344A
Authority
JP
Japan
Prior art keywords
conductors
lands
holes
substrate
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6322179A
Other languages
Japanese (ja)
Inventor
Fumitaka Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6322179A priority Critical patent/JPS55156344A/en
Publication of JPS55156344A publication Critical patent/JPS55156344A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Abstract

PURPOSE:To provide a method of connecting semiconductor, wherein a through conductors are formed in a latticelike form in an insulating substrate, whereas perforations and lands around the perforations are formed on one side of the multilayered wiring plate, and molten solder is poured from the other side of the wiring plate to make the connection between the conductors to external circuits at a high reliability. CONSTITUTION:Conductors 21 which penetrate an insulating substrate 20 are arranged in a latticed state and LSI23 are installed on a distributing layer 22. Pins 25 located at the corners of the substrate 20 are soldered and used as power and grounding terminals. A multilayer distributing substrate 30 is provided with latticed clear holes 40 which correspond to the conductors 21. Lands 41 are set up around the clear holes 40 by plating and the lands are connected to inner layer conductors 42 at the inside of the holes. The pins 25 are inserted in desired holes. The lands 41 are contacted with the solder and melting solder is poured into the clear holes 40 to perform connection. This constitution permits micropackages having many input and output signals to easily and satisfactorily connect under high reliability.
JP6322179A 1979-05-24 1979-05-24 Connection of semiconductor device Pending JPS55156344A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6322179A JPS55156344A (en) 1979-05-24 1979-05-24 Connection of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6322179A JPS55156344A (en) 1979-05-24 1979-05-24 Connection of semiconductor device

Publications (1)

Publication Number Publication Date
JPS55156344A true JPS55156344A (en) 1980-12-05

Family

ID=13222928

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6322179A Pending JPS55156344A (en) 1979-05-24 1979-05-24 Connection of semiconductor device

Country Status (1)

Country Link
JP (1) JPS55156344A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180155A (en) * 1981-04-30 1982-11-06 Nec Corp Vessel for electronic circuit
JPS60220987A (en) * 1985-03-08 1985-11-05 株式会社日立製作所 Integrated circuit mounting structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180155A (en) * 1981-04-30 1982-11-06 Nec Corp Vessel for electronic circuit
JPS60220987A (en) * 1985-03-08 1985-11-05 株式会社日立製作所 Integrated circuit mounting structure

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