JPS55153350A - Manufacture of hybrid integrated circuit - Google Patents

Manufacture of hybrid integrated circuit

Info

Publication number
JPS55153350A
JPS55153350A JP6201379A JP6201379A JPS55153350A JP S55153350 A JPS55153350 A JP S55153350A JP 6201379 A JP6201379 A JP 6201379A JP 6201379 A JP6201379 A JP 6201379A JP S55153350 A JPS55153350 A JP S55153350A
Authority
JP
Japan
Prior art keywords
groove
integrated circuit
pattern
laser light
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6201379A
Other languages
Japanese (ja)
Inventor
Shiro Kasai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6201379A priority Critical patent/JPS55153350A/en
Publication of JPS55153350A publication Critical patent/JPS55153350A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)

Abstract

PURPOSE:To eliminate dispersion of solid particles generated in a scribing process to a patterned region by a method wherein as a prior process of formation of plural number of pattern products on a surface of a hybrid integrated circuit substrate a scribing groove by laser light is provided on the back surface. CONSTITUTION:Plural number of pattern products composed of metal electrodes 5, 6, 9 and dielectric material 7 are fabricated on a surface of a hydrid integrated circuit substrate 1 consisting of a ceramic material such as Al2O3 etc. and a scribing groove is carved on the substrate 1 by laser light 3. In this process the substrate 1 is fused partially at the groove 4 by irradiation of laser light 3 and solid particles 8 are formed and may be dispersed on the pattern product, and so as to avoid this phenomenon the groove 4 is previously carved to be deep enough to be cut by being bent afterward before the pattern product is formed. By this method the product can not be damaged, and feasibility of production is improved.
JP6201379A 1979-05-18 1979-05-18 Manufacture of hybrid integrated circuit Pending JPS55153350A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6201379A JPS55153350A (en) 1979-05-18 1979-05-18 Manufacture of hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6201379A JPS55153350A (en) 1979-05-18 1979-05-18 Manufacture of hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS55153350A true JPS55153350A (en) 1980-11-29

Family

ID=13187838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6201379A Pending JPS55153350A (en) 1979-05-18 1979-05-18 Manufacture of hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS55153350A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4914815A (en) * 1988-02-23 1990-04-10 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing hybrid integrated circuits
JP2001253800A (en) * 2000-03-13 2001-09-18 Namiki Precision Jewel Co Ltd Thin sapphire substrate
DE19927046B4 (en) * 1999-06-14 2007-01-25 Electrovac Ag Ceramic-metal substrate as a multi-substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4914815A (en) * 1988-02-23 1990-04-10 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing hybrid integrated circuits
DE19927046B4 (en) * 1999-06-14 2007-01-25 Electrovac Ag Ceramic-metal substrate as a multi-substrate
JP2001253800A (en) * 2000-03-13 2001-09-18 Namiki Precision Jewel Co Ltd Thin sapphire substrate

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