JPS55134592A - Asynchronous doubled control system - Google Patents

Asynchronous doubled control system

Info

Publication number
JPS55134592A
JPS55134592A JP4141279A JP4141279A JPS55134592A JP S55134592 A JPS55134592 A JP S55134592A JP 4141279 A JP4141279 A JP 4141279A JP 4141279 A JP4141279 A JP 4141279A JP S55134592 A JPS55134592 A JP S55134592A
Authority
JP
Japan
Prior art keywords
controller
channel controller
trouble
sby
central
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4141279A
Other languages
Japanese (ja)
Other versions
JPS5745118B2 (en
Inventor
Akihiro Fukui
Kiyoshi Aizawa
Minoru Ooyama
Kazuyuki Warabine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP4141279A priority Critical patent/JPS55134592A/en
Publication of JPS55134592A publication Critical patent/JPS55134592A/en
Publication of JPS5745118B2 publication Critical patent/JPS5745118B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558—Redundancy, stand-by

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To make it possible to release independently stand-by side central control systems and also to perform the continuous and normal processing of a call in process when an operation side central control system runs into trouble, by providing the method of transferring and storing information to a channel controller system. CONSTITUTION:Operation(ATC)-system central controller 1 reads scanner 6 to discriminate the change of circuit system unit 8. Channel controller 3 transfers the read information to central controller 1 of its own system and to channel controller 4 of a stand-by(SBY) system via cross controller 5. At this time, no data are transferred between channel controller 4 of the SBY system and central controller 2. If the ACT system central control system is found to be in trouble in this state, the ACT system is changed over to the SBY system. Central controller 2 of the new ACT system after the system switching continues the process before the occurrence of the trouble by the information transferred previously into automatic channel controller 4.
JP4141279A 1979-04-05 1979-04-05 Asynchronous doubled control system Granted JPS55134592A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4141279A JPS55134592A (en) 1979-04-05 1979-04-05 Asynchronous doubled control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4141279A JPS55134592A (en) 1979-04-05 1979-04-05 Asynchronous doubled control system

Publications (2)

Publication Number Publication Date
JPS55134592A true JPS55134592A (en) 1980-10-20
JPS5745118B2 JPS5745118B2 (en) 1982-09-25

Family

ID=12607636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4141279A Granted JPS55134592A (en) 1979-04-05 1979-04-05 Asynchronous doubled control system

Country Status (1)

Country Link
JP (1) JPS55134592A (en)

Also Published As

Publication number Publication date
JPS5745118B2 (en) 1982-09-25

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