JPS57201935A - Data transfer control system - Google Patents

Data transfer control system

Info

Publication number
JPS57201935A
JPS57201935A JP8601081A JP8601081A JPS57201935A JP S57201935 A JPS57201935 A JP S57201935A JP 8601081 A JP8601081 A JP 8601081A JP 8601081 A JP8601081 A JP 8601081A JP S57201935 A JPS57201935 A JP S57201935A
Authority
JP
Japan
Prior art keywords
file
data transfer
data
processing part
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8601081A
Other languages
Japanese (ja)
Other versions
JPS6125193B2 (en
Inventor
Michio Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Facom Corp
Original Assignee
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Facom Corp filed Critical Fuji Facom Corp
Priority to JP8601081A priority Critical patent/JPS57201935A/en
Publication of JPS57201935A publication Critical patent/JPS57201935A/en
Publication of JPS6125193B2 publication Critical patent/JPS6125193B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Abstract

PURPOSE:To perform data transfer at different intervals of time by transferring data through the 2nd data transfer controlling means when an interruption command is received from a console panel during data transfer by the 1st data transfer controlling means. CONSTITUTION:A control signal E from a control part 7 actuates a processing part 10. The processing part 10 attains access to a file 14 to store data A1 of a file F1 in a file 13, and then stores data in a file F2 in the file 13, thus starting data transfer control. If an interruption signal I is sent out of a console panel 1 immediately after the transfer ends, a decision part C switches a switching circuit 9 to a contact side (b) and also triggers a timer 8. A processing part 1 actuated by the control signal E attains access to the file 14 at different intervals of time from those of the processing part 10 and stores data in the file 13. The data in the file 13 are stored in a display memory 6 and supplied to a display part 5.
JP8601081A 1981-06-04 1981-06-04 Data transfer control system Granted JPS57201935A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8601081A JPS57201935A (en) 1981-06-04 1981-06-04 Data transfer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8601081A JPS57201935A (en) 1981-06-04 1981-06-04 Data transfer control system

Publications (2)

Publication Number Publication Date
JPS57201935A true JPS57201935A (en) 1982-12-10
JPS6125193B2 JPS6125193B2 (en) 1986-06-14

Family

ID=13874712

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8601081A Granted JPS57201935A (en) 1981-06-04 1981-06-04 Data transfer control system

Country Status (1)

Country Link
JP (1) JPS57201935A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0359898U (en) * 1989-10-16 1991-06-12

Also Published As

Publication number Publication date
JPS6125193B2 (en) 1986-06-14

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