JPS5696354A - Parallel system of computer - Google Patents

Parallel system of computer

Info

Publication number
JPS5696354A
JPS5696354A JP16301679A JP16301679A JPS5696354A JP S5696354 A JPS5696354 A JP S5696354A JP 16301679 A JP16301679 A JP 16301679A JP 16301679 A JP16301679 A JP 16301679A JP S5696354 A JPS5696354 A JP S5696354A
Authority
JP
Japan
Prior art keywords
computer
data
input device
input
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16301679A
Other languages
Japanese (ja)
Inventor
Toshihiko Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16301679A priority Critical patent/JPS5696354A/en
Publication of JPS5696354A publication Critical patent/JPS5696354A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent data loss for system switching, by providing a storage area for input data, to which the receiving time from each input device is added, in a main computer and a standby computer respectively.
CONSTITUTION: If computer 6 is the main system, computer 6 detects the fault when input device 1 becomes faulty, and input data given from input device 2 is taken out immediately from storage area 9 to continue the data processing. Further, when computer 6 becomes faulty, computer 7 detects the fault and takes out an input data given from input device 2 from storage area 11 immediately to perform the data processing. In both cases, data having the receiving time to be processed next is taken out to continue the data processing because the receiving time is added to input data of storage areas 9 and 11, and therefore, loss of input data is prevented.
COPYRIGHT: (C)1981,JPO&Japio
JP16301679A 1979-12-12 1979-12-12 Parallel system of computer Pending JPS5696354A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16301679A JPS5696354A (en) 1979-12-12 1979-12-12 Parallel system of computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16301679A JPS5696354A (en) 1979-12-12 1979-12-12 Parallel system of computer

Publications (1)

Publication Number Publication Date
JPS5696354A true JPS5696354A (en) 1981-08-04

Family

ID=15765584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16301679A Pending JPS5696354A (en) 1979-12-12 1979-12-12 Parallel system of computer

Country Status (1)

Country Link
JP (1) JPS5696354A (en)

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