JPS55133553A - Semiconductor integrated device - Google Patents

Semiconductor integrated device

Info

Publication number
JPS55133553A
JPS55133553A JP4078979A JP4078979A JPS55133553A JP S55133553 A JPS55133553 A JP S55133553A JP 4078979 A JP4078979 A JP 4078979A JP 4078979 A JP4078979 A JP 4078979A JP S55133553 A JPS55133553 A JP S55133553A
Authority
JP
Japan
Prior art keywords
layer
integrated device
wire
semiconductor integrated
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4078979A
Other languages
Japanese (ja)
Inventor
Yoshitaka Sugawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4078979A priority Critical patent/JPS55133553A/en
Publication of JPS55133553A publication Critical patent/JPS55133553A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To enable high withstand voltage of a semiconductor integrated device and the increase of an electric current thereof by terminating a semiconductor layer extended along a dielectric film of a dielectric isolation semiconductor integrated device in a bulk without exposing on the surface of a semiconductor directly under a wire, to which high voltage is applied. CONSTITUTION:A p-type emitter layer pE is extended along an insulating SiO2 film 2, is terminated at one end at the side surface of the film 2 without exposing on the surface, and exposed at the end except the terminated end on a silicon surface. On the other hand, a channel cut n<+>type layer 13 is diffused under a wire 401 for an n-type emitter layer nE on the silicon surface in the vicinity of the film 2. When a forward bias is applied to this thyristor, a channel generated under a cathode wire 401 is thus shut off by an n<+>type layer 13. When a reverse bias is applied to the thyristor, there exists no junction between the layer pE and the layer nB reversely biased directly under the wire 401 to which high voltage is applied so as to enable high withstand voltage of a semiconductor integrated device and the increase of an electric current thereof.
JP4078979A 1979-04-03 1979-04-03 Semiconductor integrated device Pending JPS55133553A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4078979A JPS55133553A (en) 1979-04-03 1979-04-03 Semiconductor integrated device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4078979A JPS55133553A (en) 1979-04-03 1979-04-03 Semiconductor integrated device

Publications (1)

Publication Number Publication Date
JPS55133553A true JPS55133553A (en) 1980-10-17

Family

ID=12590379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4078979A Pending JPS55133553A (en) 1979-04-03 1979-04-03 Semiconductor integrated device

Country Status (1)

Country Link
JP (1) JPS55133553A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5939066A (en) * 1982-08-27 1984-03-03 Hitachi Ltd Semiconductor integrated circuit
JPS59117148U (en) * 1983-01-28 1984-08-07 株式会社日立製作所 semiconductor equipment
JPH01168041A (en) * 1987-11-18 1989-07-03 Grumman Aerospace Corp Method of making integrated circuit chip from wafer

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4975280A (en) * 1972-11-24 1974-07-19
JPS518880A (en) * 1974-07-10 1976-01-24 Hitachi Ltd Handotaisochi oyobi sonoseizohoho
JPS5328384A (en) * 1976-08-27 1978-03-16 Fujitsu Ltd Production method of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4975280A (en) * 1972-11-24 1974-07-19
JPS518880A (en) * 1974-07-10 1976-01-24 Hitachi Ltd Handotaisochi oyobi sonoseizohoho
JPS5328384A (en) * 1976-08-27 1978-03-16 Fujitsu Ltd Production method of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5939066A (en) * 1982-08-27 1984-03-03 Hitachi Ltd Semiconductor integrated circuit
JPH0139661B2 (en) * 1982-08-27 1989-08-22 Hitachi Ltd
JPS59117148U (en) * 1983-01-28 1984-08-07 株式会社日立製作所 semiconductor equipment
JPH0333067Y2 (en) * 1983-01-28 1991-07-12
JPH01168041A (en) * 1987-11-18 1989-07-03 Grumman Aerospace Corp Method of making integrated circuit chip from wafer

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