JPH0333067Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a semiconductor device using a dielectric isolation structure, and particularly to an element structure suitable for a high voltage semiconductor integrated circuit element.

[Prior art]

FIG. 1 is an example of a cross-sectional structure of a diode according to the prior art using a so-called dielectric isolation structure in which a plurality of single crystal islands are embedded in a support base via a dielectric film. In the figure, 1 is an insulating separation film (dielectric film);
2 is a surface insulating film, 3 is a first conductivity type single crystal island region, 4 is a highly impurity-concentrated first conductivity type layer formed on the bottom and side surfaces of the single crystal island region, and 5 is a surface of the single crystal island region. The second part is formed to extend inward from the
The conductivity type layer 6 indicates wiring.

In the example of the diode shown in FIG. 1, the thickness of the second conductivity type layer 5 on the surface of the single crystal island region is increased in order to increase the withstand voltage of the device, and the thickness of the second conductivity type layer 5 on the surface of the single crystal island region is increased. As a blocking layer for channels generated on the surface of the single crystal island region 3 of the conductive type, a layer 4 of the first conductive type with a high impurity concentration is provided on the bottom and side surfaces of the single crystal island region. Therefore, there is a drawback that the element size becomes large.

FIG. 2 is an example of a cross-sectional structure of a conventional lateral type 1 transistor (for example, a PNP bipolar transistor) using a dielectric isolation structure. In the figure, 10 is a second conductivity type emitter layer, 11 is a second conductivity type emitter layer, and 11 is a second conductivity type emitter layer.
It is a conductive type collector layer.

In the example of the horizontal type 1 transistor in Fig. 2,
Since the emitter layer 10 and the collector layer 11 are arranged laterally, and the distance between the emitter layer 10 and the collector layer 11 has to be increased in order to obtain a high breakdown voltage, there is a drawback that the element dimensions become larger in the lateral direction. Further, since the distance between the emitter layer 10 and the collector layer 11 is long and it is difficult to control the surface recombination current, the current amplification rate of the transistor is small and its control is also difficult. It also has the disadvantage of having a small cutoff frequency. Furthermore, there is also a drawback that the characteristics of the transistor are unstable due to the influence of interfacial charges generated at the interface between the semiconductor portions 3, 10, 11 and the surface insulating film 2. In addition, the collector layer 11
Since a channel is generated under the wiring 6, there is a drawback that it is necessary to increase the thickness of the insulating layer 12 and increase the length of the lead wiring 13 in order to increase the withstand voltage.

Figure 3 shows a first type transistor and a second type transistor (for example, an NPN bipolar transistor) in a semiconductor integrated circuit using a dielectric isolation structure.
This is a cross-sectional structure of a conventional example in which both are vertical transistors. In the figure, 16 is the second point on the surface of the single crystal island region.
A conductive type layer, 17 a first conductive type layer in the second conductive type layer, 20 a first conductive type layer on the surface of the single crystal island region, and 21 a second conductive type layer in the first conductive type layer. shows the layers of In the first type transistor consisting of 3, 4, 16, and 17, 17 functions as an emitter layer, 16 a base layer, 3 an island region serving as a collector layer, and 4 a channel stopper. 3, 4, 20,
In the second type transistor 21, 21 is an emitter, 20 is a base, 3 is a collector, and 4 is a first conductivity type layer having a high impurity concentration and functioning as a channel stopper.

In the example shown in FIG. 3, the current amplification rate and cutoff frequency of both the first type and second type transistors can be increased, and the controllability is also good, but single crystal island regions 3 of different conductivity types are It is necessary to arrange them on the substrate at the same time, which has the disadvantage of complicating the manufacturing process.

[Purpose of invention]

The purposes of this invention are (1) to improve the degree of integration in semiconductor integrated circuits with dielectric isolation structures, (2) to improve the performance of semiconductor integrated circuits by improving the characteristics of transistors, and (3) to improve the performance of semiconductor integrated circuits by improving the characteristics of transistors. The aim is to achieve 1) and (2) without complicating the manufacturing process.

[Summary of the idea]

The key point of the present invention is to provide a junction extending along the bottom and side surfaces of the single crystal island region, which has not been conventionally used as a junction between the first conductivity type and the second conductivity type. This is due to improved functionality.

[Example of idea]

FIG. 4 is an example of a cross-sectional view of a diode having a dielectric isolation structure according to the present invention. 23 is a layer of the second conductivity type formed on the bottom and side surfaces of the single crystal island region.

In the diode shown in FIG. 4, since the second conductivity type layer is formed on the bottom and side surfaces of the single crystal island region, it is possible to make the diode smaller than the example of the diode shown in FIG. Further, since no channel is generated due to the wiring 6 connected to the first conductivity type layer, it is advantageous for increasing the breakdown voltage of the device. The layer 4 functioning as a channel stopper in the diode example of FIG. 1 is no longer required, which leads to a smaller device.

FIG. 5 is an example of a cross-sectional structure of a first type transistor having a dielectric isolation structure according to the present invention. In the same figure,
27 is a second region extending inward from the surface of the single crystal island region.
The conductive type layer 6' indicates wiring.

In the transistor of FIG. 5, when 27 functions as an emitter layer, 3 functions as a base layer, and 23 functions as a collector layer, by providing the collector layer 23 on the bottom and side surfaces of the single crystal island region, The size can be reduced compared to the example of a type transistor. Since the wiring 6' of the collector 23 does not need to pass over the first conductivity type single crystal island region 3, there is no channel under the wiring as shown in the example of the first type transistor in FIG. It is advantageous for pressure resistance. In the horizontal type 1 transistor shown in Fig. 2, the current amplification rate was 10 to 20 and the cutoff frequency was about 100 KHz, whereas in the vertical type transistor according to the present invention shown in Fig. 50 to 100, and the cutoff frequency can be increased to several MHz. At the same time, stability and controllability of characteristics can be easily obtained by making the thickness of the emitter layer 27 and the base layer directly below it sufficiently smaller than that of the side surface.
Furthermore, since the collector layer can be placed all over the bottom and side surfaces of the single crystal island region, a small island can realize low collector resistance.

FIG. 6 is an example of a cross-sectional structural diagram of a multi-emitter transistor having a dielectric isolation structure according to the present invention.

In this multi-emitter transistor layer,
When 27 functions as an emitter layer, 3 as a base layer, and 23 as a collector layer, it is possible to form a uniform distance between each emitter layer 27 and the collector layer 23, and it is smaller and has better characteristics than manufacturing with conventional technology. uniform multi-emitter transistors can be manufactured.

FIG. 7 is an example of a cross-sectional structure of a particularly high-voltage first type transistor having a dielectric isolation structure according to the present invention. In the figure, 37, 38, 39, and 40 indicate wiring that also serves as a field plate.

In the transistor shown in FIG. 7, 27 functions as an emitter layer, 3 functions as a base layer, and 23 functions as a collector layer, and a case will be described below in which a voltage is applied from the emitter layer to the collector layer to put the transistor in a blocking state. The field plates 37 and 38 improve the device breakdown voltage by laterally expanding a depletion layer on the surface of the single crystal island region generated from the collector layer 23 toward the base layer 3. Field plates 39 and 40 have emitters due to excessive expansion of the depletion layer on the surface of the single crystal island region.
By preventing the punch-through phenomenon from occurring between the collectors, the device breakdown voltage is improved.

FIG. 8 is an example of a second type transistor which is provided in a separate single crystal island at the same time as the first type transistor according to the present invention shown in FIG. 5 in a semiconductor integrated circuit having a dielectric isolation structure. In the same figure, 4
4 indicates a layer of the first conductivity type within the layer of the second conductivity type on the surface of the single crystal island region.

In the example of the transistor shown in FIG. 8, the second conductivity type layer on the bottom and side surfaces of the single crystal island region is in a floating state, but the first conductivity type layer 44, the second conductivity type layer 27, The layer 3 of the first conductivity type and the layer 23 of the second conductivity type are connected in series, which has the disadvantage that a thyristor operation may occur due to the influence of the internal resistance of each layer, resulting in latch-up.

FIG. 9 is an example of a cross-sectional structure of a second type transistor having a dielectric isolation structure according to the present invention, which improves the drawbacks of the second type transistor shown in FIG. 8. In the figure, 49 is a layer of the first conductivity type that is part of the bottom surface of the single crystal island region, and 6'' is a wiring that short-circuits the single crystal island region of the first conductivity type and the layer 23 of the second conductivity type on the side surface thereof. shows.

In the example of the second type transistor shown in FIG. 9, a layer 49 of the first conductivity type is provided at a location where the layer 44 on the bottom surface of the single crystal island region is projected and in the vicinity thereof, and a layer 49 of the first conductivity type is provided at this location.
3, thereby reducing the area of the second conductivity type layer on the bottom and side surfaces of the single crystal island region in the example of the second type transistor in FIG. 8, and reducing the possibility of latch-up due to thyristor operation. It has been reduced. This makes it possible to provide a second type transistor on another single crystal island at the same time as a first type transistor.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of a conventional diode using a dielectric isolation structure, Fig. 2 is a cross-sectional view of a conventional horizontal type 1 transistor using a dielectric isolation structure, and Fig.
The figure shows a conventional cross-sectional view where both the first type transistor and the second type transistor are vertical type transistors.
FIG. 4 is a cross-sectional view of a diode with a dielectric isolation structure of the present invention, FIG. 5 is a cross-sectional view of a first type transistor with a dielectric isolation structure of the present invention, and FIG. 6 is a multi-channel diode with a dielectric isolation structure of the present invention. 7 is a cross-sectional view of the emitter transistor, FIG. 7 is a cross-sectional view of the first type transistor with the dielectric isolation structure of the present invention, and FIG. 8 is a cross-sectional view of the second type transistor to be provided simultaneously with the first type transistor of FIG. 9 is a cross-sectional view of a second type transistor having a dielectric isolation structure according to the present invention. 3... Single crystal island region of first conductivity type, 6... Wiring, 23... Layer of second conductivity type on the bottom and side surfaces of the single crystal island region, 27... Second conductivity on the surface of the single crystal island region Layers of mold.

Claims (1)

[Claims for Utility Model Registration] A plurality of single crystal island regions of a first conductivity type are embedded in a pair of single crystal island regions of a dielectric separation substrate in which a plurality of single crystal island regions of a first conductivity type are embedded in a support base through a dielectric film. In a device in which a first type bipolar transistor having an emitter layer and a second type bipolar transistor having a second conductivity type emitter layer are respectively formed, the first single crystal island region in which the first type bipolar transistor is formed is A first base layer of a second conductivity type extending inward from the surface of the island region, a first emitter layer of the first conductivity type extending inward from the surface of the first base layer, and a portion where the first emitter layer is projected onto the bottom of the island region. a peripheral layer of a second conductivity type that is provided on the entire surface between the island region and the dielectric film except for the second conductivity type and whose end portion is exposed on the surface of the island region, and a first emitter electrode is provided on the first emitter layer on the surface of the island region. , a first base electrode is provided in the first base layer, a first collector electrode is provided in the island region and the peripheral layer, and the second single crystal island region in which the second type bipolar transistor is formed is provided on the island region surface. a second conductivity type second emitter layer extending inward from the second conductivity type, and a second conductivity type second collector layer provided over the entire surface between the island region and the dielectric film and having an end exposed on the surface of the island region. A semiconductor device characterized in that a second emitter electrode is provided on a second emitter layer, a second base electrode is provided on the island region, and a second collector electrode is provided on the second collector layer on the surface of the island region.