JPS55132582A - High speed semiconductor memory unit - Google Patents

High speed semiconductor memory unit

Info

Publication number
JPS55132582A
JPS55132582A JP3977479A JP3977479A JPS55132582A JP S55132582 A JPS55132582 A JP S55132582A JP 3977479 A JP3977479 A JP 3977479A JP 3977479 A JP3977479 A JP 3977479A JP S55132582 A JPS55132582 A JP S55132582A
Authority
JP
Japan
Prior art keywords
address
register
readout
memory
high speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3977479A
Other languages
Japanese (ja)
Inventor
Kyozo Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP3977479A priority Critical patent/JPS55132582A/en
Publication of JPS55132582A publication Critical patent/JPS55132582A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To speed up the memory operation, by using the regularity of address sequence of memory and the access method of memory cell effectively. CONSTITUTION:When the address word enters the address register 21, it is divided into X and Y adresses and respectively stored in the X and Y address registers 22 and 23. Comparison is made at the coincidence circuit 27 between the address word stored immediately before in the register 23 to X address sector and the new data. When in agreement, since the data to be obtained is already in the readout register 26, it is not necessary for the readout and access in the path of the register 22 memory cell 25 register 26. The Y address of the register 23 is changed from the address word before to the next address word and data is read out in the register 26 via the selector circuit 27 according to the change. Acordingly, the readout operation is made at the readout section 28 only, and very high speed memory readout can be made at the range where Y address only changes, by speeding up this part.
JP3977479A 1979-04-04 1979-04-04 High speed semiconductor memory unit Pending JPS55132582A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3977479A JPS55132582A (en) 1979-04-04 1979-04-04 High speed semiconductor memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3977479A JPS55132582A (en) 1979-04-04 1979-04-04 High speed semiconductor memory unit

Publications (1)

Publication Number Publication Date
JPS55132582A true JPS55132582A (en) 1980-10-15

Family

ID=12562273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3977479A Pending JPS55132582A (en) 1979-04-04 1979-04-04 High speed semiconductor memory unit

Country Status (1)

Country Link
JP (1) JPS55132582A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6162980A (en) * 1984-09-05 1986-03-31 Hitachi Ltd Picture memory peripheral lsi
US4581721A (en) * 1981-11-18 1986-04-08 Texas Instruments Incorporated Memory apparatus with random and sequential addressing
JPS63271647A (en) * 1987-04-30 1988-11-09 Yokogawa Medical Syst Ltd Memory circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4581721A (en) * 1981-11-18 1986-04-08 Texas Instruments Incorporated Memory apparatus with random and sequential addressing
JPS6162980A (en) * 1984-09-05 1986-03-31 Hitachi Ltd Picture memory peripheral lsi
JPS63271647A (en) * 1987-04-30 1988-11-09 Yokogawa Medical Syst Ltd Memory circuit

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