JPS5730168A - Cash memory access system - Google Patents

Cash memory access system

Info

Publication number
JPS5730168A
JPS5730168A JP10307480A JP10307480A JPS5730168A JP S5730168 A JPS5730168 A JP S5730168A JP 10307480 A JP10307480 A JP 10307480A JP 10307480 A JP10307480 A JP 10307480A JP S5730168 A JPS5730168 A JP S5730168A
Authority
JP
Japan
Prior art keywords
memory
address
cash
request
priority
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10307480A
Other languages
Japanese (ja)
Inventor
Masatoshi Koto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10307480A priority Critical patent/JPS5730168A/en
Publication of JPS5730168A publication Critical patent/JPS5730168A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855—Overlapped cache accessing, e.g. pipeline

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To enable a memory request at a high speed processing by giving priority to a memory request hitting a cash memory which has been executed without adding priority. CONSTITUTION:A memory request from one of two ports consisting of cash request flip-flop FFs 21 and 23 and address registers 22 and 24 is selected by a circuit consisting of a priority deciding circuit 29 and a selector 32 to obtain a cash address 32. This address 32 is used to refer to the indexes of a cash memory part 8 and when access to a main storage device 11 is necessary, the address 32 is stored in a main storage address register 36. On the basis of the result of the referring of the memory indexes, the memory part 8 outputs a hit signal when data of the memory request resides in the memory after the address 32 is set or a misshit signal when not as an index result signal 34.
JP10307480A 1980-07-29 1980-07-29 Cash memory access system Pending JPS5730168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10307480A JPS5730168A (en) 1980-07-29 1980-07-29 Cash memory access system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10307480A JPS5730168A (en) 1980-07-29 1980-07-29 Cash memory access system

Publications (1)

Publication Number Publication Date
JPS5730168A true JPS5730168A (en) 1982-02-18

Family

ID=14344492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10307480A Pending JPS5730168A (en) 1980-07-29 1980-07-29 Cash memory access system

Country Status (1)

Country Link
JP (1) JPS5730168A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733473A (en) * 1980-07-31 1982-02-23 Fujitsu Ltd Memory access control system
EP0259095A2 (en) * 1986-08-27 1988-03-09 Amdahl Corporation Cache storage queue
EP0265108A2 (en) * 1986-10-17 1988-04-27 Amdahl Corporation Cache storage priority

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5733473A (en) * 1980-07-31 1982-02-23 Fujitsu Ltd Memory access control system
JPS622343B2 (en) * 1980-07-31 1987-01-19 Fujitsu Ltd
EP0259095A2 (en) * 1986-08-27 1988-03-09 Amdahl Corporation Cache storage queue
EP0265108A2 (en) * 1986-10-17 1988-04-27 Amdahl Corporation Cache storage priority

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