JPS5621245A - Detection system of address coincidence system - Google Patents

Detection system of address coincidence system

Info

Publication number
JPS5621245A
JPS5621245A JP9702679A JP9702679A JPS5621245A JP S5621245 A JPS5621245 A JP S5621245A JP 9702679 A JP9702679 A JP 9702679A JP 9702679 A JP9702679 A JP 9702679A JP S5621245 A JPS5621245 A JP S5621245A
Authority
JP
Japan
Prior art keywords
register
address
content
bits
comparing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9702679A
Other languages
Japanese (ja)
Other versions
JPS6013491B2 (en
Inventor
Takeshi Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54097026A priority Critical patent/JPS6013491B2/en
Publication of JPS5621245A publication Critical patent/JPS5621245A/en
Publication of JPS6013491B2 publication Critical patent/JPS6013491B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Advance Control (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To simplify the circuit constitution, by giving the compared address information on the instruction prefetch access route and comparing it with the present part of the memory access register.
CONSTITUTION: The comparing address register 3 to obtain address coincidence is provided so that the content of this register and that of the address register 2 pointing the present address can selectively be input to the instruction prefetch incrementer 5. Further, while the content of the address register 2 is held in the memory access address register 7 in the form of real address, the content of the register 3 is fed to the comparison circuit in the form of real address, and at least the value excluding the lower rank P bits in the content of the register 7 and the value excluding the lower rank P bits as the result of the content of the register 3 converted into the real address are compared at the comparison circuit 8.
COPYRIGHT: (C)1981,JPO&Japio
JP54097026A 1979-07-30 1979-07-30 Address match detection method Expired JPS6013491B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54097026A JPS6013491B2 (en) 1979-07-30 1979-07-30 Address match detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54097026A JPS6013491B2 (en) 1979-07-30 1979-07-30 Address match detection method

Publications (2)

Publication Number Publication Date
JPS5621245A true JPS5621245A (en) 1981-02-27
JPS6013491B2 JPS6013491B2 (en) 1985-04-08

Family

ID=14180911

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54097026A Expired JPS6013491B2 (en) 1979-07-30 1979-07-30 Address match detection method

Country Status (1)

Country Link
JP (1) JPS6013491B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5886648A (en) * 1981-11-18 1983-05-24 Mitsubishi Electric Corp Tracing device
JPS59125449A (en) * 1982-12-31 1984-07-19 Fujitsu Ltd Control system of virtual computer
JPS6227829A (en) * 1985-07-30 1987-02-05 Fujitsu Ltd Control system for multiplex load instruction

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5886648A (en) * 1981-11-18 1983-05-24 Mitsubishi Electric Corp Tracing device
JPS59125449A (en) * 1982-12-31 1984-07-19 Fujitsu Ltd Control system of virtual computer
JPS6227829A (en) * 1985-07-30 1987-02-05 Fujitsu Ltd Control system for multiplex load instruction
JPH0578053B2 (en) * 1985-07-30 1993-10-28 Fujitsu Ltd

Also Published As

Publication number Publication date
JPS6013491B2 (en) 1985-04-08

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