JPS55124244A - Method of fabricating chip component - Google Patents
Method of fabricating chip componentInfo
- Publication number
- JPS55124244A JPS55124244A JP3268479A JP3268479A JPS55124244A JP S55124244 A JPS55124244 A JP S55124244A JP 3268479 A JP3268479 A JP 3268479A JP 3268479 A JP3268479 A JP 3268479A JP S55124244 A JPS55124244 A JP S55124244A
- Authority
- JP
- Japan
- Prior art keywords
- protective film
- substrate
- cutout
- forming
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dicing (AREA)
Abstract
PURPOSE:To readily enable mass production of chip components completely coated with protective film on a semiconductor element by forming the element on a support substrate, forming a dividing cutout reaching from the element side to the substrate and forming the protective film thereon in this state. CONSTITUTION:A semiconductor element 12 is formed on the main surface of a support substrate 11, and dividing cutouts 14 are formed from the element 12 side to reach the substrate 11. Then, a protective film 13 is formed on the surface side formed with the cutouts 14 by a sputter process or a chemical evaporation process or the like. Thus, the film 13 is formed not only on the bottom surface of the cutout 14 but on the side surface. Thereafter, the substrate 11 is divided along the cutout 14 to obtain a chip component coated with the protective film not only on the main surface of the element 12 but on the side surface thereof. Thus, it can readily fabricate in mass production the chip components which are stabilized in characteristics upon coating of the film 13 over the side surfaces of the element 12.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3268479A JPS55124244A (en) | 1979-03-20 | 1979-03-20 | Method of fabricating chip component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3268479A JPS55124244A (en) | 1979-03-20 | 1979-03-20 | Method of fabricating chip component |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55124244A true JPS55124244A (en) | 1980-09-25 |
Family
ID=12365694
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3268479A Pending JPS55124244A (en) | 1979-03-20 | 1979-03-20 | Method of fabricating chip component |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55124244A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4904610A (en) * | 1988-01-27 | 1990-02-27 | General Instrument Corporation | Wafer level process for fabricating passivated semiconductor devices |
US5742094A (en) * | 1993-01-25 | 1998-04-21 | Intel Corporation | Sealed semiconductor chip |
US6680241B2 (en) * | 2000-07-25 | 2004-01-20 | Fujitsu Limited | Method of manufacturing semiconductor devices by dividing wafer into chips and such semiconductor devices |
US11877388B2 (en) | 2020-06-22 | 2024-01-16 | AT&SAustria Technologie & Systemtechnik AG | Component carrier with embedded component covered by functional film having an inhomogeneous thickness distribution |
-
1979
- 1979-03-20 JP JP3268479A patent/JPS55124244A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4904610A (en) * | 1988-01-27 | 1990-02-27 | General Instrument Corporation | Wafer level process for fabricating passivated semiconductor devices |
US5742094A (en) * | 1993-01-25 | 1998-04-21 | Intel Corporation | Sealed semiconductor chip |
US5856705A (en) * | 1993-01-25 | 1999-01-05 | Intel Corporation | Sealed semiconductor chip and process for fabricating sealed semiconductor chip |
US6680241B2 (en) * | 2000-07-25 | 2004-01-20 | Fujitsu Limited | Method of manufacturing semiconductor devices by dividing wafer into chips and such semiconductor devices |
US11877388B2 (en) | 2020-06-22 | 2024-01-16 | AT&SAustria Technologie & Systemtechnik AG | Component carrier with embedded component covered by functional film having an inhomogeneous thickness distribution |
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