JPS5511380A - Semiconductor - Google Patents

Semiconductor

Info

Publication number
JPS5511380A
JPS5511380A JP8470478A JP8470478A JPS5511380A JP S5511380 A JPS5511380 A JP S5511380A JP 8470478 A JP8470478 A JP 8470478A JP 8470478 A JP8470478 A JP 8470478A JP S5511380 A JPS5511380 A JP S5511380A
Authority
JP
Japan
Prior art keywords
source
gate
vgs1
layer
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8470478A
Other languages
Japanese (ja)
Inventor
Koichi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8470478A priority Critical patent/JPS5511380A/en
Publication of JPS5511380A publication Critical patent/JPS5511380A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02B—INTERNAL-COMBUSTION PISTON ENGINES; COMBUSTION ENGINES IN GENERAL
    • F02B1/00—Engines characterised by fuel-air mixture compression
    • F02B1/02—Engines characterised by fuel-air mixture compression with positive ignition
    • F02B1/04—Engines characterised by fuel-air mixture compression with positive ignition with fuel-air mixture admission into cylinder

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain a constant current source by setting between gate and source the resistance equal to VGS1/ID wherein the drain current - the value at the intersection of the characteristic curves the voltage that are obtained between gate and source when ambient temperature is changed with the voltage between drain and source kept constant are ID and VGS1 respectively. CONSTITUTION:When ambient temperature is changed with the voltage between drain and source kept constant, the characteristic curves of the drain current - the voltage between gate and source intersect each other almost at a point (ID1, VGS1) and the variation of drain current by temperature is minimum at said point. This is utilized in setting the parasitic resistance between gate and source to RS VGS1/ID1 and making a short-circuit between source and gate at a source earthing type circuit so that voltage VGS1 and current ID1 can be maintained at self-saturation type bias by said resistance RS. N-epitaxial layer 2 on a P<+>-type substrate 1 is separated by P<+>-type layer 3, an FET 100 and a resistor 200 are provided on each of thus-obtained divisions of said layer 2, and resistor layer is set to RS. Each of the ends of said resistor 200 is connected to the source 6 of said FET 100 or said separating layer 3, and said substrate 1 is used as the drain of gate N<+> layer 7 so that a constant current source can be obtained.
JP8470478A 1978-07-11 1978-07-11 Semiconductor Pending JPS5511380A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8470478A JPS5511380A (en) 1978-07-11 1978-07-11 Semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8470478A JPS5511380A (en) 1978-07-11 1978-07-11 Semiconductor

Publications (1)

Publication Number Publication Date
JPS5511380A true JPS5511380A (en) 1980-01-26

Family

ID=13838042

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8470478A Pending JPS5511380A (en) 1978-07-11 1978-07-11 Semiconductor

Country Status (1)

Country Link
JP (1) JPS5511380A (en)

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