JPS55113356A - Manufacture of electronic circuit and multilead frame - Google Patents
Manufacture of electronic circuit and multilead frameInfo
- Publication number
- JPS55113356A JPS55113356A JP1982779A JP1982779A JPS55113356A JP S55113356 A JPS55113356 A JP S55113356A JP 1982779 A JP1982779 A JP 1982779A JP 1982779 A JP1982779 A JP 1982779A JP S55113356 A JPS55113356 A JP S55113356A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- frame
- multilead
- chip
- manufacture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To simplify classified display process by a method wherein a semiconductor element under the condition of multiframes is assembled and is sealed with resin, then its characteristics are examined, and based on the result, a bend, a cut or a hole is provided on lead pieces provided on a frame. CONSTITUTION:Multilead frame 1 is provided. A semiconductor chip is fixed on the tub provided on this. Wire bonding is operated between electrode and lead 4. Next, molding is operated on the chip and a part of the lead by using resin 2. Surrounding lead parts 7 are separated from frame 1. Their ends are bent. Subsequently, the electric characteristics of the chip are measured through the lead. Based on the result, a part of the lead piece of the corner part is bent as shown in 5a-5c, for classified display. By this, re-detection after storage is simplified.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982779A JPS55113356A (en) | 1979-02-23 | 1979-02-23 | Manufacture of electronic circuit and multilead frame |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982779A JPS55113356A (en) | 1979-02-23 | 1979-02-23 | Manufacture of electronic circuit and multilead frame |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55113356A true JPS55113356A (en) | 1980-09-01 |
Family
ID=12010120
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1982779A Pending JPS55113356A (en) | 1979-02-23 | 1979-02-23 | Manufacture of electronic circuit and multilead frame |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55113356A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4868635A (en) * | 1988-01-13 | 1989-09-19 | Texas Instruments Incorporated | Lead frame for integrated circuit |
KR20000006167A (en) * | 1998-06-19 | 2000-01-25 | 클라크 3세 존 엠. | Method of making integrated circuit packages |
-
1979
- 1979-02-23 JP JP1982779A patent/JPS55113356A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4868635A (en) * | 1988-01-13 | 1989-09-19 | Texas Instruments Incorporated | Lead frame for integrated circuit |
KR20000006167A (en) * | 1998-06-19 | 2000-01-25 | 클라크 3세 존 엠. | Method of making integrated circuit packages |
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