JPS55113195A - Reading method of memory unit - Google Patents

Reading method of memory unit

Info

Publication number
JPS55113195A
JPS55113195A JP2035579A JP2035579A JPS55113195A JP S55113195 A JPS55113195 A JP S55113195A JP 2035579 A JP2035579 A JP 2035579A JP 2035579 A JP2035579 A JP 2035579A JP S55113195 A JPS55113195 A JP S55113195A
Authority
JP
Japan
Prior art keywords
read
reference voltage
level
power consumption
memory cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2035579A
Other languages
Japanese (ja)
Other versions
JPS6117076B2 (en
Inventor
Kazuhiro Toyoda
Yukio Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2035579A priority Critical patent/JPS55113195A/en
Publication of JPS55113195A publication Critical patent/JPS55113195A/en
Publication of JPS6117076B2 publication Critical patent/JPS6117076B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To quicken a read as well as reduction in power consumption of emitter detection type memory cells, by lowering a read reference voltage only during read reference voltage only during read operation. CONSTITUTION:Emitter detection type memory cells MC are connected to respective intersections between many word lines W and bit lines B. Read reference voltage VD applied to transistors connecting sense amplifier SA to bit lines B is temporarily lowered when a word line potential rises from a non-selection level up to a selection level. This reference voltage is developed by level-shifting the output of write amplifier WA. Thus, the reference voltage is lowered only during read operation to lower a read level, so that the power consumption would be reduced by increasing the load resistance of cells, the read time can be shortened.
JP2035579A 1979-02-23 1979-02-23 Reading method of memory unit Granted JPS55113195A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2035579A JPS55113195A (en) 1979-02-23 1979-02-23 Reading method of memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2035579A JPS55113195A (en) 1979-02-23 1979-02-23 Reading method of memory unit

Publications (2)

Publication Number Publication Date
JPS55113195A true JPS55113195A (en) 1980-09-01
JPS6117076B2 JPS6117076B2 (en) 1986-05-06

Family

ID=12024797

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2035579A Granted JPS55113195A (en) 1979-02-23 1979-02-23 Reading method of memory unit

Country Status (1)

Country Link
JP (1) JPS55113195A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5880190A (en) * 1981-10-19 1983-05-14 フエアチヤイルド　カメラ　アンド　インストルメント　コ−ポレ−シヨン Dynamic reading reference voltage generator
US4751683A (en) * 1984-10-22 1988-06-14 Mitsubishi Denki Kabushiki Kaisha Static semiconductor memory device comprising word lines each operating at three different voltage levels

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0575202U (en) * 1992-03-13 1993-10-15 株式会社アジクリエーション Trash can

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5880190A (en) * 1981-10-19 1983-05-14 フエアチヤイルド　カメラ　アンド　インストルメント　コ−ポレ−シヨン Dynamic reading reference voltage generator
US4751683A (en) * 1984-10-22 1988-06-14 Mitsubishi Denki Kabushiki Kaisha Static semiconductor memory device comprising word lines each operating at three different voltage levels

Also Published As

Publication number Publication date
JPS6117076B2 (en) 1986-05-06

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