JPS5641592A - Semiconductor memory unit - Google Patents

Semiconductor memory unit

Info

Publication number
JPS5641592A
JPS5641592A JP11648179A JP11648179A JPS5641592A JP S5641592 A JPS5641592 A JP S5641592A JP 11648179 A JP11648179 A JP 11648179A JP 11648179 A JP11648179 A JP 11648179A JP S5641592 A JPS5641592 A JP S5641592A
Authority
JP
Japan
Prior art keywords
potential
line
level
word line
memory unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11648179A
Other languages
Japanese (ja)
Other versions
JPS6226116B2 (en
Inventor
Toshio Takeshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11648179A priority Critical patent/JPS5641592A/en
Publication of JPS5641592A publication Critical patent/JPS5641592A/en
Publication of JPS6226116B2 publication Critical patent/JPS6226116B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)

Abstract

PURPOSE:To improve the efficiency of utilization of a memory unit by increasing the potential difference between pieces of cell information H and L by using a capacitor with no voltage dependency for cell capacity and by driving it via a storage word line. CONSTITUTION:As signal levels when word line W is selected, a high potential and intermediate potential are used. The high potential level is so set that while selection gate GT is completely turned on in a read of binary information stored in capacitor Cso8, the potential of bit line B will substantially be equalized to that of node S. Then, the intermediate potential level is set to an adequate value to turn off GT when the potential of line B after sense amplifiers 3 and 30 are activated is at the high level and to turn on it when at the low level. The potential of storage word line Z varies from the low potential to the high potential when line W is at the intermediate potential level and then varies from the high potential to the low potential after line W is unselected.
JP11648179A 1979-09-11 1979-09-11 Semiconductor memory unit Granted JPS5641592A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11648179A JPS5641592A (en) 1979-09-11 1979-09-11 Semiconductor memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11648179A JPS5641592A (en) 1979-09-11 1979-09-11 Semiconductor memory unit

Publications (2)

Publication Number Publication Date
JPS5641592A true JPS5641592A (en) 1981-04-18
JPS6226116B2 JPS6226116B2 (en) 1987-06-06

Family

ID=14688168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11648179A Granted JPS5641592A (en) 1979-09-11 1979-09-11 Semiconductor memory unit

Country Status (1)

Country Link
JP (1) JPS5641592A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60177495A (en) * 1984-02-22 1985-09-11 Nec Corp Semiconductor memory device
JPS63894A (en) * 1986-06-20 1988-01-05 Hitachi Ltd Memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60177495A (en) * 1984-02-22 1985-09-11 Nec Corp Semiconductor memory device
JPS63894A (en) * 1986-06-20 1988-01-05 Hitachi Ltd Memory

Also Published As

Publication number Publication date
JPS6226116B2 (en) 1987-06-06

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