JPS55111155A - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereofInfo
- Publication number
- JPS55111155A JPS55111155A JP1873479A JP1873479A JPS55111155A JP S55111155 A JPS55111155 A JP S55111155A JP 1873479 A JP1873479 A JP 1873479A JP 1873479 A JP1873479 A JP 1873479A JP S55111155 A JPS55111155 A JP S55111155A
- Authority
- JP
- Japan
- Prior art keywords
- diffused region
- oxide film
- low
- density
- drain diffused
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE: To heighten the density of a metal oxide semiconductor and a load resistor and improve electric properties, by placing at least one end of a low-concentration layer of high resistivity in direct contact with the diffused layer of a driving transistor.
CONSTITUTION: A field oxide film 20 is provided by high-temperature oxidation on a semiconductor substrate 21. A gate oxide film 24 is then provided. Boron is injected to provide a gate electrode 25. The gate electrode is used as a mask to produce a source diffused region 22 and a drain diffused region 23 to provide a MOSFET. A contact hole 27a, which communicates with the drain diffused region 23, is provided. A member 26 of high resistivity is provided by injection of P ions. An silicon oxide film 29 is grown. A protective film 30 and a wiring metal 28 are provided. Since one end of the low-concentration layer 26 is located in direct contact with the drain diffused region 23 of the driving MOSFET, the contact is easily realized and its scattering is reduced. Since a high-resistance portion and a low-resistance portion do not need to be separated from each other, the density can be raised.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1873479A JPS55111155A (en) | 1979-02-20 | 1979-02-20 | Semiconductor device and manufacturing method thereof |
US06/545,002 US4475964A (en) | 1979-02-20 | 1983-10-24 | Method of manufacturing a semiconductor device |
US06/665,081 US4558343A (en) | 1979-02-20 | 1984-10-26 | Semiconductor device having a high resistivity layer in direct contact with a polycrystalline silicon layer of high impurity concentration |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1873479A JPS55111155A (en) | 1979-02-20 | 1979-02-20 | Semiconductor device and manufacturing method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55111155A true JPS55111155A (en) | 1980-08-27 |
Family
ID=11979892
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1873479A Pending JPS55111155A (en) | 1979-02-20 | 1979-02-20 | Semiconductor device and manufacturing method thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55111155A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5244832A (en) * | 1985-10-16 | 1993-09-14 | Texas Instruments Incorporated | Method for fabricating a poly emitter logic array and apparatus produced thereby |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53109487A (en) * | 1977-03-07 | 1978-09-25 | Matsushita Electric Ind Co Ltd | Manufacture for semiconductor device |
-
1979
- 1979-02-20 JP JP1873479A patent/JPS55111155A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53109487A (en) * | 1977-03-07 | 1978-09-25 | Matsushita Electric Ind Co Ltd | Manufacture for semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5244832A (en) * | 1985-10-16 | 1993-09-14 | Texas Instruments Incorporated | Method for fabricating a poly emitter logic array and apparatus produced thereby |
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