JPS55102253A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS55102253A
JPS55102253A JP895379A JP895379A JPS55102253A JP S55102253 A JPS55102253 A JP S55102253A JP 895379 A JP895379 A JP 895379A JP 895379 A JP895379 A JP 895379A JP S55102253 A JPS55102253 A JP S55102253A
Authority
JP
Japan
Prior art keywords
film
sio
regions
polycrystal
treating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP895379A
Other languages
Japanese (ja)
Inventor
Hideto Goto
Haruo Amano
Koji Takemae
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP895379A priority Critical patent/JPS55102253A/en
Publication of JPS55102253A publication Critical patent/JPS55102253A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To make the surface flat and to prevent the breakdown of wiring by using polycrystal Si containing impurities as a diffusing source when an element region is formed in a semiconductor substrate, and leaving an SiO2 film obtained by heat- treating the polycrystal on the surface outside the region.
CONSTITUTION: An SiO2 film 202 is deposited on an Si substrate 201, and an element-forming region is covered by an Si3N4 film 203. A field SiO2 film 204 is formed on the peripheral portion by heat-treating. Then, the films 203 and 202 are removed, a gate SiO2 film 215 is deposited on the removed portion, and openings 205a and 205b are provided. A polycrystal Si layer 206 containing impurities is stuck all over the surface. Then, Si3N4-film masks 208a to 208d are provided on the specified areas, the exposed layer 206 is transformed into an SiO2 film 209 by heat- treating, and deep source and drain regions 210a and 210b are formed by diffusing impurities from the inside of the layer 106. Furthermore, shallow regions 211a and 211bare formed on both sides of the regions 210aand 210b, and Al wirings 213a and 213b are attached to the said regions.
COPYRIGHT: (C)1980,JPO&Japio
JP895379A 1979-01-29 1979-01-29 Manufacture of semiconductor device Pending JPS55102253A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP895379A JPS55102253A (en) 1979-01-29 1979-01-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP895379A JPS55102253A (en) 1979-01-29 1979-01-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS55102253A true JPS55102253A (en) 1980-08-05

Family

ID=11707028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP895379A Pending JPS55102253A (en) 1979-01-29 1979-01-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS55102253A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4800172A (en) * 1987-02-09 1989-01-24 Kabushiki Kaisha Toshiba Manufacturing method for cascaded junction field effect transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4800172A (en) * 1987-02-09 1989-01-24 Kabushiki Kaisha Toshiba Manufacturing method for cascaded junction field effect transistor

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