JPS5485662A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5485662A JPS5485662A JP15393877A JP15393877A JPS5485662A JP S5485662 A JPS5485662 A JP S5485662A JP 15393877 A JP15393877 A JP 15393877A JP 15393877 A JP15393877 A JP 15393877A JP S5485662 A JPS5485662 A JP S5485662A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- diffusion layer
- output
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To enable voltage conversion without requiring external mounted components, power supply, and excessive power consumption, by connecting the isolation gate FET of depletion type built in at the output of two semiconductor devices using different power supply voltages. CONSTITUTION:Either of the source diffusion layer or drain diffusion layer of Tr56, P channel transistor having the performance of depletion type formed on one substrate is connected to the output 12 of P-MOS device constituted with transistors Tr52 and Tr51 of power supply voltage IVcc 1, the gate electrode is grounded, and another diffusion layer is connected to the output terminal 13. Further, the terminal 13 is connected to the input terminal 14 of C-MOS device of transistors Tr53, Tr54, and Tr55 in which the power supply voltage ¦VDD¦ is less than ¦Vcc¦. In this case, the voltage V out of the output terminal 13 to the voltage V in of the outut 12 can freely be selected with the ion injection condition of Tr55 and a given conversion value can be obtained with excellent accuracy.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15393877A JPS5485662A (en) | 1977-12-20 | 1977-12-20 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15393877A JPS5485662A (en) | 1977-12-20 | 1977-12-20 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5485662A true JPS5485662A (en) | 1979-07-07 |
Family
ID=15573353
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15393877A Pending JPS5485662A (en) | 1977-12-20 | 1977-12-20 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5485662A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5779735A (en) * | 1980-11-05 | 1982-05-19 | Toshiba Corp | Semiconductor circuit |
| JPS6331313A (en) * | 1986-07-21 | 1988-02-10 | シ−メンス、アクチエンゲゼルシヤフト | Integratable circuit device for level conversion |
| JPH02158213A (en) * | 1988-12-09 | 1990-06-18 | Nec Corp | Output buffer circuit for cmos semiconductor integrated circuit |
| US7810611B2 (en) | 2003-11-17 | 2010-10-12 | Otis Elevator Company | Elevator car assembly having an adjustable platform |
-
1977
- 1977-12-20 JP JP15393877A patent/JPS5485662A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5779735A (en) * | 1980-11-05 | 1982-05-19 | Toshiba Corp | Semiconductor circuit |
| JPS6331313A (en) * | 1986-07-21 | 1988-02-10 | シ−メンス、アクチエンゲゼルシヤフト | Integratable circuit device for level conversion |
| JPH02158213A (en) * | 1988-12-09 | 1990-06-18 | Nec Corp | Output buffer circuit for cmos semiconductor integrated circuit |
| US7810611B2 (en) | 2003-11-17 | 2010-10-12 | Otis Elevator Company | Elevator car assembly having an adjustable platform |
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