JPS54154268A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54154268A
JPS54154268A JP6317178A JP6317178A JPS54154268A JP S54154268 A JPS54154268 A JP S54154268A JP 6317178 A JP6317178 A JP 6317178A JP 6317178 A JP6317178 A JP 6317178A JP S54154268 A JPS54154268 A JP S54154268A
Authority
JP
Japan
Prior art keywords
capsule
impurity
unified
column
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6317178A
Other languages
Japanese (ja)
Inventor
Shunji Nakao
Yasuhide Komatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6317178A priority Critical patent/JPS54154268A/en
Publication of JPS54154268A publication Critical patent/JPS54154268A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To ensure the uniform diffusion of the impurity for the semiconductor wafer by forming the solid state source with the 2-split hollow column or multiple square pillar, putting the wafer into the source and then diffusing the impurity from the column or multiple square pillar.
CONSTITUTION: The solid state source is split into upper and lower capsules 1 and 2 in the form of the half-column, half-square pillar or half-hexagonal pillar with a sufficient thickness to withstand the heat deformation. Also, gas inlet/outlet 3 is provided at the end part of the capsules in order to introduce the gas inside when capsule 1 and 2 are unified together. Thus, quartz boat 6 containing wafers 5 is stored in capsule 2, and then capsule 1 is put on capsule 2 to be unified together. This unified capsule is then put onto supporter 4 and then put into furnace core tube 7. Then the unified capsule is heated up to diffuse the impurity to wafer 5. In this way, the impurity can be diffused uniformly, and furthermore, a number of sheets of wafers can be processed since nosolid state source plate is stored inside.
COPYRIGHT: (C)1979,JPO&Japio
JP6317178A 1978-05-25 1978-05-25 Manufacture of semiconductor device Pending JPS54154268A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6317178A JPS54154268A (en) 1978-05-25 1978-05-25 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6317178A JPS54154268A (en) 1978-05-25 1978-05-25 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS54154268A true JPS54154268A (en) 1979-12-05

Family

ID=13221533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6317178A Pending JPS54154268A (en) 1978-05-25 1978-05-25 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54154268A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223452A (en) * 1989-12-21 1993-06-29 Knepprath Vernon E Method and apparatus for doping silicon spheres

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223452A (en) * 1989-12-21 1993-06-29 Knepprath Vernon E Method and apparatus for doping silicon spheres

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