JPS54148363A - Tri-state circuit - Google Patents

Tri-state circuit

Info

Publication number
JPS54148363A
JPS54148363A JP5676578A JP5676578A JPS54148363A JP S54148363 A JPS54148363 A JP S54148363A JP 5676578 A JP5676578 A JP 5676578A JP 5676578 A JP5676578 A JP 5676578A JP S54148363 A JPS54148363 A JP S54148363A
Authority
JP
Japan
Prior art keywords
transistor
turned
emitter
terminal
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5676578A
Other languages
Japanese (ja)
Other versions
JPS6142898B2 (en
Inventor
Noboru Kiyozuka
Susumu Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5676578A priority Critical patent/JPS54148363A/en
Publication of JPS54148363A publication Critical patent/JPS54148363A/en
Publication of JPS6142898B2 publication Critical patent/JPS6142898B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/0823—Multistate logic
    • H03K19/0826—Multistate logic one of the states being the high impedance or floating state

Abstract

PURPOSE:To apply the high-level and low-level signals to the base of the transistor of the multi-emitter and one of the emitters each to turn off the transistor of the emitter-earthed base input of the next step and the buffer circuit and then to set the connection of the transistor and the buffer circuit to the high impedance. CONSTITUTION:In the case of terminal S at the high level, the operation is decided by the base potential of transistor Q3 of the multi-emitter to secure the operation in accordance with input I1 and I2. When terminal S features the low level, Q1 and Q2 are turned off with increment of the potential at node c. And Q3 is turned on and the current flows to terminal S with the base current of Q6 turned off at O. With Q3 turned on, node b features the low level with Q4 and Q5 truned off and output X features the high impedance. In this way, the high impedance state can be set only with multi-emitter terminal E2 of diode D1, D3 and Q3. As a result, the number of the element can be reduced with the transistors connecting to node b and c reduced, thus decreasing the parasitic capacity as well as the propagation delay time.
JP5676578A 1978-05-12 1978-05-12 Tri-state circuit Granted JPS54148363A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5676578A JPS54148363A (en) 1978-05-12 1978-05-12 Tri-state circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5676578A JPS54148363A (en) 1978-05-12 1978-05-12 Tri-state circuit

Publications (2)

Publication Number Publication Date
JPS54148363A true JPS54148363A (en) 1979-11-20
JPS6142898B2 JPS6142898B2 (en) 1986-09-24

Family

ID=13036580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5676578A Granted JPS54148363A (en) 1978-05-12 1978-05-12 Tri-state circuit

Country Status (1)

Country Link
JP (1) JPS54148363A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6370497A (en) * 1986-09-11 1988-03-30 松下電器産業株式会社 Method of fitting electronic parts

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155930A (en) * 1976-06-18 1977-12-24 Ncr Co Reloadable capacitive memory array

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155930A (en) * 1976-06-18 1977-12-24 Ncr Co Reloadable capacitive memory array

Also Published As

Publication number Publication date
JPS6142898B2 (en) 1986-09-24

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