JPS54128656A - Flip flop circuit of current selection type - Google Patents

Flip flop circuit of current selection type

Info

Publication number
JPS54128656A
JPS54128656A JP3748378A JP3748378A JPS54128656A JP S54128656 A JPS54128656 A JP S54128656A JP 3748378 A JP3748378 A JP 3748378A JP 3748378 A JP3748378 A JP 3748378A JP S54128656 A JPS54128656 A JP S54128656A
Authority
JP
Japan
Prior art keywords
circuit
fed
potential
flip flop
flop circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3748378A
Other languages
Japanese (ja)
Other versions
JPS6255327B2 (en
Inventor
Takamasa Suzuki
Takahisa Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3748378A priority Critical patent/JPS54128656A/en
Publication of JPS54128656A publication Critical patent/JPS54128656A/en
Publication of JPS6255327B2 publication Critical patent/JPS6255327B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To increase the degree of circuit integration, by reducing the number of elements rmarkably, through the addition of one transistor to the basic FF circuit to realize one set operation circuit. CONSTITUTION:The setting transistor QS is added to the basic FF circuit consisting of the transistors Q1 to Q6. The collector of Qs is connected to the collector of Q1 and Q2 in common connection and the emitter of Qs is to the emitter of Q5. When sufficiently higher potential than the logic level fed to the terminal CL, for example, the ground potential is fed to the base input terminal S of Qs, Qs is made to conductive state independently of the conduction of Q5 and Q6, and the current is drawn compulsively from the constant current source to enable to set the low level. Further, when compulsive write-in operation is not made, the potential less than the second reference potential VR2 is fed to the base input of Qs to keep interrupting the Qs.
JP3748378A 1978-03-30 1978-03-30 Flip flop circuit of current selection type Granted JPS54128656A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3748378A JPS54128656A (en) 1978-03-30 1978-03-30 Flip flop circuit of current selection type

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3748378A JPS54128656A (en) 1978-03-30 1978-03-30 Flip flop circuit of current selection type

Publications (2)

Publication Number Publication Date
JPS54128656A true JPS54128656A (en) 1979-10-05
JPS6255327B2 JPS6255327B2 (en) 1987-11-19

Family

ID=12498758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3748378A Granted JPS54128656A (en) 1978-03-30 1978-03-30 Flip flop circuit of current selection type

Country Status (1)

Country Link
JP (1) JPS54128656A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592435A (en) * 1982-06-29 1984-01-09 Fujitsu Ltd Ecl circuit
JPS62220016A (en) * 1986-03-20 1987-09-28 Fujitsu Ltd Clock both phases drive ff circuit with set or reset
US4874966A (en) * 1987-01-31 1989-10-17 U.S. Philips Corporation Multivibrator circuit having compensated delay time

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3363115A (en) * 1965-03-29 1968-01-09 Gen Micro Electronics Inc Integral counting circuit with storage capacitors in the conductive path of steering gate circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3363115A (en) * 1965-03-29 1968-01-09 Gen Micro Electronics Inc Integral counting circuit with storage capacitors in the conductive path of steering gate circuits

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592435A (en) * 1982-06-29 1984-01-09 Fujitsu Ltd Ecl circuit
JPS62220016A (en) * 1986-03-20 1987-09-28 Fujitsu Ltd Clock both phases drive ff circuit with set or reset
JPH0371814B2 (en) * 1986-03-20 1991-11-14 Fujitsu Ltd
US4874966A (en) * 1987-01-31 1989-10-17 U.S. Philips Corporation Multivibrator circuit having compensated delay time

Also Published As

Publication number Publication date
JPS6255327B2 (en) 1987-11-19

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