JPS54137283A - Lateral pnp transistor - Google Patents

Lateral pnp transistor

Info

Publication number
JPS54137283A
JPS54137283A JP4558378A JP4558378A JPS54137283A JP S54137283 A JPS54137283 A JP S54137283A JP 4558378 A JP4558378 A JP 4558378A JP 4558378 A JP4558378 A JP 4558378A JP S54137283 A JPS54137283 A JP S54137283A
Authority
JP
Japan
Prior art keywords
region
type
density
diffusion
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4558378A
Other languages
Japanese (ja)
Inventor
Goro Mitarai
Hiroshi Saikai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP4558378A priority Critical patent/JPS54137283A/en
Publication of JPS54137283A publication Critical patent/JPS54137283A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE: To enhance the dielectric strength, the current amplification factor and the cut-off frequency by giving an inclination of density to the base region of the PNP lateral transistor, setting the density of the collector region lower than that of the base region and thus extending the depletion layer toward the collector.
CONSTITUTION: N-type layer 2 is epitaxial-grown on P-type semiconductor substrate 1 and then covered with oxide film 10 to form by diffusion P-type isolation region 3 reaching up to substrate with the opening drilled. Then P-type region 8 is formed by the ion injection method and with adjustment of the impurity density within island region 22 comprising layer 2 of one side where the PNP transistor is to be formed. After this, N-type region 9 reaching the bottom of region 8 is formed by diffusion at the fixed area of region 8 with a higher density than region 8 along with a density inclination in order to obtain the base region. Then the P- type diffusion is given to region 8 and 9 as well as to island 21 of the other side where the NPN transistor is to be formed, thus forming base region 4 of the NPN element, collector region 6a of the PNP element, emitter region 5a and emitter region 7 of the NPN element.
COPYRIGHT: (C)1979,JPO&Japio
JP4558378A 1978-04-17 1978-04-17 Lateral pnp transistor Pending JPS54137283A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4558378A JPS54137283A (en) 1978-04-17 1978-04-17 Lateral pnp transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4558378A JPS54137283A (en) 1978-04-17 1978-04-17 Lateral pnp transistor

Publications (1)

Publication Number Publication Date
JPS54137283A true JPS54137283A (en) 1979-10-24

Family

ID=12723361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4558378A Pending JPS54137283A (en) 1978-04-17 1978-04-17 Lateral pnp transistor

Country Status (1)

Country Link
JP (1) JPS54137283A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713758A (en) * 1980-06-27 1982-01-23 Nec Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713758A (en) * 1980-06-27 1982-01-23 Nec Corp Semiconductor device

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