JPS54142080A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54142080A
JPS54142080A JP5061078A JP5061078A JPS54142080A JP S54142080 A JPS54142080 A JP S54142080A JP 5061078 A JP5061078 A JP 5061078A JP 5061078 A JP5061078 A JP 5061078A JP S54142080 A JPS54142080 A JP S54142080A
Authority
JP
Japan
Prior art keywords
layer
type
base layer
base
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5061078A
Other languages
Japanese (ja)
Inventor
Koichi Kanzaki
Minoru Taguchi
Hajime Sasaki
Akihiko Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP5061078A priority Critical patent/JPS54142080A/en
Publication of JPS54142080A publication Critical patent/JPS54142080A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/658—Integrated injection logic integrated in combination with analog structures

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To increase the current amplification factor at the backward operation time by providing the insulator layer featuring nearly the same depth as the base layer, when integrating I<2>L, at the rgions except for the area opposing to the injector at the periphery of the base layer of the inverter transistor. CONSTITUTION:N<+>-type buried layer 121 and 122 are provided at the fixed region on P-type Si substrate 11, and then N-type layer 13 is epitaxial-grown on the entire surface. Then the I<2>L part and the bipolar circuit part are separated to each other via P<+>-type layer 14 reaching substrate 11. After this, P-type base layers 151a- 151c of the inverter transistor of I<2>L, P-type emitter layers 152a-152c of the injector transistor opposing to 151a-151c plus P-type base layer 153 of the bipolar circuit part are formed by diffusion at layer 121 and 122 plus layer 13 and 14. After this, N<+>-type collector layers 161a-161c, N<+>-type collector layer 162 and N<+>-type layer 163 are provided respectively within each base layer. Then SiO2 insulator layer 17 featuring the same depth as base layer 15 is buried in around each element region of the I<2>L part.
JP5061078A 1978-04-27 1978-04-27 Semiconductor device Pending JPS54142080A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5061078A JPS54142080A (en) 1978-04-27 1978-04-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5061078A JPS54142080A (en) 1978-04-27 1978-04-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS54142080A true JPS54142080A (en) 1979-11-05

Family

ID=12863730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5061078A Pending JPS54142080A (en) 1978-04-27 1978-04-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54142080A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481130A (en) * 1994-02-21 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor IIL device with dielectric and diffusion isolation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481130A (en) * 1994-02-21 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor IIL device with dielectric and diffusion isolation
US5693543A (en) * 1994-02-21 1997-12-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor IIL device with dielectric and diffusion isolation

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