JPS54124674A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS54124674A JPS54124674A JP3269578A JP3269578A JPS54124674A JP S54124674 A JPS54124674 A JP S54124674A JP 3269578 A JP3269578 A JP 3269578A JP 3269578 A JP3269578 A JP 3269578A JP S54124674 A JPS54124674 A JP S54124674A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- insulating film
- internal wiring
- wiring layer
- aperture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13011—Shape comprising apertures or cavities, e.g. hollow bump
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13012—Shape in top view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13016—Shape in side view
- H01L2224/13018—Shape in side view comprising protrusions or indentations
- H01L2224/13019—Shape in side view comprising protrusions or indentations at the bonding interface of the bump connector, i.e. on the surface of the bump connector
Abstract
PURPOSE: To prevent the crack generation of intermediate layers caused by heat and pressure and prevent the generation of inter-metal compound near the electrode part by forming the protruded electrode at the top layer so that this electrode cannot cover the aperture part of the protection insulating film.
CONSTITUTION: Insulating film 12 is provided on one main face of semiconductor substrae 11, and internal wiring layer 13 is provided on this film 12, and protection insulating film 14 which cover internal wiring layer 13 is provided. Next, aperture 15 is provided in protection insulating film 14, and intermediate layer 16 which is conductive to internal wiring layer 14 through aperture 15 and has a part cover protection insulating film 14 is provided. Protruded electrode 17 at the top layer is provided in a D shape so that electrode 17 may be positioned above internal wiring layer 13 approximately and cannot cover the upper part of aperture 15. As a result, cracks caused by heat and pressure at the time when a lead wire is connected to protruded electrode 17 are not generated in intermediate layer 16, and inter-metal compound of the protruded electrode and the internal wiring layer is prevented from being generated, so that reliability can be improved.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3269578A JPS54124674A (en) | 1978-03-20 | 1978-03-20 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3269578A JPS54124674A (en) | 1978-03-20 | 1978-03-20 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54124674A true JPS54124674A (en) | 1979-09-27 |
Family
ID=12365980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3269578A Pending JPS54124674A (en) | 1978-03-20 | 1978-03-20 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54124674A (en) |
-
1978
- 1978-03-20 JP JP3269578A patent/JPS54124674A/en active Pending
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