JPS54121033A - Digital code inversion circuit - Google Patents

Digital code inversion circuit

Info

Publication number
JPS54121033A
JPS54121033A JP2774178A JP2774178A JPS54121033A JP S54121033 A JPS54121033 A JP S54121033A JP 2774178 A JP2774178 A JP 2774178A JP 2774178 A JP2774178 A JP 2774178A JP S54121033 A JPS54121033 A JP S54121033A
Authority
JP
Japan
Prior art keywords
output
input
adder
signal
inversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2774178A
Other languages
Japanese (ja)
Inventor
Tadashi Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2774178A priority Critical patent/JPS54121033A/en
Publication of JPS54121033A publication Critical patent/JPS54121033A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To obtain a code inversion circuit of a simple constitution which does not cuase the error and also deletes the discontinuous characteristics of the output at the maximum level by providing the logic means to perform the operation whether the output data is inverted or not according to the code inversion input.
CONSTITUTION: Negative logic inversion X is given to input terminals I3WI0 of adder 1, and code inversion input E of terminal CI is applied to be then delivered through output terminals O3WO0. In such constitution, the input and output of adder 1 show the same value in case signal E is O. At the same time, signal E inverts the output of adder 1 via gate 4 and 5 and delivers signal Y with the positive logic. When signal E is 1, 1 is added to adder 1 and the output features X + 1 = -X. In case the highest-rank bit of the input is -MAX-1, output Y = inversion (inverse X + 1) = +MAX is obtained via gate 4 and 5. Thus, the discontinuity can be solved. Thus, the output error caused by the code inversion and the discontinuity can be deleted through the simple constitution of the logic gate.
COPYRIGHT: (C)1979,JPO&Japio
JP2774178A 1978-03-13 1978-03-13 Digital code inversion circuit Pending JPS54121033A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2774178A JPS54121033A (en) 1978-03-13 1978-03-13 Digital code inversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2774178A JPS54121033A (en) 1978-03-13 1978-03-13 Digital code inversion circuit

Publications (1)

Publication Number Publication Date
JPS54121033A true JPS54121033A (en) 1979-09-19

Family

ID=12229448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2774178A Pending JPS54121033A (en) 1978-03-13 1978-03-13 Digital code inversion circuit

Country Status (1)

Country Link
JP (1) JPS54121033A (en)

Similar Documents

Publication Publication Date Title
JPS5690483A (en) Address buffer circuit
JPS57109089A (en) Initial value resetting circuit for operational amplifier
JPS57106227A (en) Buffer circuit
JPS57132461A (en) Converter for binary data code
JPS54121033A (en) Digital code inversion circuit
JPS5530212A (en) Logical-operation type digital compander
JPS54146530A (en) Binary coding circuit
JPS564911A (en) Digital limiter
JPS54112134A (en) Logical operation circuit
JPS5250680A (en) Non-linear code decoder
JPS5537924A (en) Integrated circuit
JPS5463617A (en) Input circuit
JPS55121544A (en) Multiplication rounding circuit
JPS5552024A (en) Light modulator control system
JPS57150221A (en) On and off detecting circuit of switch
JPS56149823A (en) Band pass filter
JPS6476211A (en) Digital logic integrated circuit
JPS56160049A (en) Mode change-over circuit
JPS55139618A (en) Coding method
JPS5559580A (en) Arithmetic control unit
JPS5637814A (en) Demodulating circuit for self-clocking information signal
JPS53124023A (en) Noise deletion circuit
JPS54138975A (en) Position pulse correcting circuit
JPS57154941A (en) Lsi converting system of logical circuit
JPS54142952A (en) Logic arithmetic integrated circuit