JPS54113270A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54113270A
JPS54113270A JP2045578A JP2045578A JPS54113270A JP S54113270 A JPS54113270 A JP S54113270A JP 2045578 A JP2045578 A JP 2045578A JP 2045578 A JP2045578 A JP 2045578A JP S54113270 A JPS54113270 A JP S54113270A
Authority
JP
Japan
Prior art keywords
region
electrode
circuit
drain
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2045578A
Other languages
Japanese (ja)
Other versions
JPS6210032B2 (en
Inventor
Toshio Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2045578A priority Critical patent/JPS54113270A/en
Publication of JPS54113270A publication Critical patent/JPS54113270A/en
Publication of JPS6210032B2 publication Critical patent/JPS6210032B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
    • H01L27/0738—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with resistors only

Abstract

PURPOSE:To obtain a high-speed, high-density, large-scale and general-purpose device by providing a current leakage path between drain and source regions in the semiconductor substrate surface near the edge of the channel region constituting a MOS memory. CONSTITUTION:Poly-crystal Si gate electrode 102 is provided across the surface of active region 101, and drain region 103 and source region 104 are provided in both sides of electrode 102, and leakage current path 105 is provided while being positioned at the edge of gate electrode 102. Next, Al electrode leading-out lines 106 to 108 are fitted to electrode 102, region 103 and region 104 respectively to make a MOS memory. Thus, the circuit has a constitution where N channel enhancement- type MOS transistor Q and resistance RL of the two-terminal coupling to the drain and the source exist, and as a result, this circuit having only one MOS transistor is equivalent to a circuit where two elements are combined, and density is impeoved.
JP2045578A 1978-02-23 1978-02-23 Semiconductor device Granted JPS54113270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2045578A JPS54113270A (en) 1978-02-23 1978-02-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2045578A JPS54113270A (en) 1978-02-23 1978-02-23 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS54113270A true JPS54113270A (en) 1979-09-04
JPS6210032B2 JPS6210032B2 (en) 1987-03-04

Family

ID=12027536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2045578A Granted JPS54113270A (en) 1978-02-23 1978-02-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54113270A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59130459A (en) * 1983-01-17 1984-07-27 Hitachi Ltd Semiconductor memory integrated circuit device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59130459A (en) * 1983-01-17 1984-07-27 Hitachi Ltd Semiconductor memory integrated circuit device
JPH045271B2 (en) * 1983-01-17 1992-01-30

Also Published As

Publication number Publication date
JPS6210032B2 (en) 1987-03-04

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