JPS54111747A - Drive circuit for matrix - Google Patents
Drive circuit for matrixInfo
- Publication number
- JPS54111747A JPS54111747A JP1921478A JP1921478A JPS54111747A JP S54111747 A JPS54111747 A JP S54111747A JP 1921478 A JP1921478 A JP 1921478A JP 1921478 A JP1921478 A JP 1921478A JP S54111747 A JPS54111747 A JP S54111747A
- Authority
- JP
- Japan
- Prior art keywords
- input
- current source
- constant current
- circuit
- trq1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
Landscapes
- Logic Circuits (AREA)
Abstract
PURPOSE:To constitute the circuit less in power consumption, even with current selection type circuit, by giving the full breeder current of the circuit with one constant current source commonly, independent of the number of inputs. CONSTITUTION:The input drive current switch transistors TrQ1, Q3... every input are connected each input to the base and the collector is connected to the line (or row) giving each input of the matrix array circuit. Further, the emitter of TrQR for reference voltage in which the base is commonly connected to the reference voltage VREF set to the intermediate voltage of the high and low level of input, and the emitter of TrQ1, Q2... are commonly connected, and the potential point is connected to the constant current source IT. Thus, when high level signal is fed to the input IN, either of TrQ1, Q2... is turned on and the breeder currents IR1, IR2, IR3... flow via this to the constant current source IT, then the constant current source IT can be set to the value almost equal to the full breader current, and it can not be changed even with the number of inputs IN increased.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53019214A JPS6049379B2 (en) | 1978-02-22 | 1978-02-22 | matrix drive circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53019214A JPS6049379B2 (en) | 1978-02-22 | 1978-02-22 | matrix drive circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54111747A true JPS54111747A (en) | 1979-09-01 |
JPS6049379B2 JPS6049379B2 (en) | 1985-11-01 |
Family
ID=11993112
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53019214A Expired JPS6049379B2 (en) | 1978-02-22 | 1978-02-22 | matrix drive circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6049379B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105438A (en) * | 1979-02-07 | 1980-08-13 | Nec Corp | Logic array |
-
1978
- 1978-02-22 JP JP53019214A patent/JPS6049379B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105438A (en) * | 1979-02-07 | 1980-08-13 | Nec Corp | Logic array |
Also Published As
Publication number | Publication date |
---|---|
JPS6049379B2 (en) | 1985-11-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US3961326A (en) | Solid state digital to analog converter | |
GB1491059A (en) | Voltage level conversion circuit | |
US4309693A (en) | Solid state digital to analog converter | |
JPS54111747A (en) | Drive circuit for matrix | |
JPS5571000A (en) | Memory unit | |
JPS55118229A (en) | Multiplexer circuit | |
JPS5478964A (en) | Selection circuit | |
SU444249A1 (en) | -Display shift register | |
JPS5753152A (en) | Inverter circuit | |
JPS5545259A (en) | Transistor output circuit | |
JPS55134539A (en) | Logic level converting circuit | |
JPS548452A (en) | Analog gate circuit | |
JPS55114037A (en) | Output buffer circuit | |
JPS56123128A (en) | Logic circuit | |
JPS5453935A (en) | Logic circuit | |
JPS5651072A (en) | Logic circuit | |
GB908789A (en) | ||
JPS5530220A (en) | Signal transfer circuit | |
JPS5462766A (en) | Logic circuit of current change-over type | |
JPS6446295A (en) | Rom circuit | |
JPS5733832A (en) | Output circuit | |
JPS57162521A (en) | Gate circuit | |
JPS5610717A (en) | Emitter-follower circuit of transistor | |
JPS54129864A (en) | Fast logic circuit | |
JPS5493337A (en) | Semiconductor memory unit |