JPS54104248A - Digital arithmetic control method - Google Patents

Digital arithmetic control method

Info

Publication number
JPS54104248A
JPS54104248A JP1046378A JP1046378A JPS54104248A JP S54104248 A JPS54104248 A JP S54104248A JP 1046378 A JP1046378 A JP 1046378A JP 1046378 A JP1046378 A JP 1046378A JP S54104248 A JPS54104248 A JP S54104248A
Authority
JP
Japan
Prior art keywords
arithmetic
subtracter
deviation
residual
divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1046378A
Other languages
Japanese (ja)
Other versions
JPS6118782B2 (en
Inventor
Hiroaki Aotsu
Yasuo Morooka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1046378A priority Critical patent/JPS54104248A/en
Publication of JPS54104248A publication Critical patent/JPS54104248A/en
Publication of JPS6118782B2 publication Critical patent/JPS6118782B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To improve arithmetic accuracy of arithmetic control which includes digital arithmetic causing a truncation error, by feeding a truncation error back to an input signal.
CONSTITUTION: For example, in case of the arithmetic unit of a primary lag unit performing integer arithmetic, deviation (ε1) is obtained by inputting input value (x), output value (z) of the arithmetic stage preceding by one, and residual (Δx) at the division time of divider 10 to subtracter 20. By receiving (ε1) as its input, subtracter 10 obtains quotient (ε2) and truncates its residual. Residual (Δx') of divider 10 is therefore extracted by using multiplier 15 and subtracter 40 and stored temporarily in memory 31 before being used for the formation of a deviation at the next step. Then, quotient (ε2) is inputted to adder 21 and added to the output of the stage preceding by one, and the sum is used for the formation of a deviation at the next step. An arithmetic error is therefore eliminated through this repetitive procedure.
COPYRIGHT: (C)1979,JPO&Japio
JP1046378A 1978-02-03 1978-02-03 Digital arithmetic control method Granted JPS54104248A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1046378A JPS54104248A (en) 1978-02-03 1978-02-03 Digital arithmetic control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1046378A JPS54104248A (en) 1978-02-03 1978-02-03 Digital arithmetic control method

Publications (2)

Publication Number Publication Date
JPS54104248A true JPS54104248A (en) 1979-08-16
JPS6118782B2 JPS6118782B2 (en) 1986-05-14

Family

ID=11750820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1046378A Granted JPS54104248A (en) 1978-02-03 1978-02-03 Digital arithmetic control method

Country Status (1)

Country Link
JP (1) JPS54104248A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62260227A (en) * 1986-05-06 1987-11-12 Yamaha Corp Multiplication circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0321292A (en) * 1989-06-17 1991-01-30 Masaru Nakayama Bobbin thread winding device of sewing machine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62260227A (en) * 1986-05-06 1987-11-12 Yamaha Corp Multiplication circuit
JPH0448253B2 (en) * 1986-05-06 1992-08-06 Yamaha Corp

Also Published As

Publication number Publication date
JPS6118782B2 (en) 1986-05-14

Similar Documents

Publication Publication Date Title
JPS54104248A (en) Digital arithmetic control method
JPS55123701A (en) Command generation system
JPS5532161A (en) Integration processing unit
JPS51128525A (en) Input process for the digital information
JPS5412641A (en) Input method for computer numeral controller
GB845294A (en) Electronic spectroanalyzer systems
JPS5741738A (en) Digital multiplier
JPS5739472A (en) Operation system of digital differential analyzer
JPS5694435A (en) Multiplying circuit
JPS5291626A (en) Input data correction system in electronic apparatus
JPS5556252A (en) Digital differential analyzer
JPS5663649A (en) Parallel multiplication apparatus
JPS5520508A (en) Processor for division
JPS5785142A (en) Random number generating circuit
JPS5624646A (en) Divider
JPS5665321A (en) Processor for digital signal
JPS54112661A (en) Process measuring apparatus
JPS5599649A (en) Digital multiplier
JPS5553742A (en) Division device
JPS5685127A (en) Digital signal processor
JPS5642869A (en) Motion picture/still picture separator
JPS5726235A (en) Control method for number of engine revolutions
JPS5275945A (en) Computation system
JPS60247736A (en) Dividing circuit
SU765802A1 (en) Device for extracting the third root