JPS54102940A - Information process system - Google Patents
Information process systemInfo
- Publication number
- JPS54102940A JPS54102940A JP1034178A JP1034178A JPS54102940A JP S54102940 A JPS54102940 A JP S54102940A JP 1034178 A JP1034178 A JP 1034178A JP 1034178 A JP1034178 A JP 1034178A JP S54102940 A JPS54102940 A JP S54102940A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- order
- outside
- register
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Debugging And Monitoring (AREA)
Abstract
PURPOSE: To ensure easy display and rewriting for the internal memory and register via the external control signal by inhibiting the order executing action with the control signal given from outside.
CONSTITUTION: Memory 1 or 4 are read out based on the contents of program counter PC9 and then stored in order register IR5. The order is sent to timing signal generator circuit MC7 from decoder 6 to generate the machine signals to decide the process execution, and the processes are advanced. When break signal BRK17 arrives from outside, the normal machine signals are inhibited as soon as the order under execution is over. And other machine signals are produced from MC7 to inhibit the output of decoder 6 and then inhibit all order executing actions. This state continues as long as signal 17 exists. The reading or writing becomes possible for the memory and the register by applying reading signal 18, writing signal 19 and address signal 20 from outside.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53010341A JPS6048770B2 (en) | 1978-01-31 | 1978-01-31 | Information processing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53010341A JPS6048770B2 (en) | 1978-01-31 | 1978-01-31 | Information processing method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54102940A true JPS54102940A (en) | 1979-08-13 |
JPS6048770B2 JPS6048770B2 (en) | 1985-10-29 |
Family
ID=11747478
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53010341A Expired JPS6048770B2 (en) | 1978-01-31 | 1978-01-31 | Information processing method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6048770B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS603746A (en) * | 1983-06-21 | 1985-01-10 | Mitsubishi Electric Corp | Controller using microcomputer |
JPS61182142A (en) * | 1985-02-06 | 1986-08-14 | Nec Corp | Signal processing method and signal processing microprocessor |
JPS61269705A (en) * | 1985-05-24 | 1986-11-29 | Omron Tateisi Electronics Co | Programmable controller |
-
1978
- 1978-01-31 JP JP53010341A patent/JPS6048770B2/en not_active Expired
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS603746A (en) * | 1983-06-21 | 1985-01-10 | Mitsubishi Electric Corp | Controller using microcomputer |
JPS61182142A (en) * | 1985-02-06 | 1986-08-14 | Nec Corp | Signal processing method and signal processing microprocessor |
JPS61269705A (en) * | 1985-05-24 | 1986-11-29 | Omron Tateisi Electronics Co | Programmable controller |
Also Published As
Publication number | Publication date |
---|---|
JPS6048770B2 (en) | 1985-10-29 |
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