JPS5365663A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5365663A
JPS5365663A JP14168076A JP14168076A JPS5365663A JP S5365663 A JPS5365663 A JP S5365663A JP 14168076 A JP14168076 A JP 14168076A JP 14168076 A JP14168076 A JP 14168076A JP S5365663 A JPS5365663 A JP S5365663A
Authority
JP
Japan
Prior art keywords
plating
manufacture
semiconductor device
thick
terminal wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14168076A
Other languages
Japanese (ja)
Inventor
Masaru Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14168076A priority Critical patent/JPS5365663A/en
Publication of JPS5365663A publication Critical patent/JPS5365663A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To obtain a thick vamp terminal wiring which is free from lateral expansion of the plating by carrying out an electric plating for the thick external terminal wiring before formation of an internal circuit wiring through plating.
COPYRIGHT: (C)1978,JPO&Japio
JP14168076A 1976-11-24 1976-11-24 Manufacture of semiconductor device Pending JPS5365663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14168076A JPS5365663A (en) 1976-11-24 1976-11-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14168076A JPS5365663A (en) 1976-11-24 1976-11-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5365663A true JPS5365663A (en) 1978-06-12

Family

ID=15297696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14168076A Pending JPS5365663A (en) 1976-11-24 1976-11-24 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5365663A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6417449A (en) * 1987-07-10 1989-01-20 Fuji Electric Co Ltd Formation of bump electrode of semiconductor device
US5108950A (en) * 1987-11-18 1992-04-28 Casio Computer Co., Ltd. Method for forming a bump electrode for a semiconductor device
US5270253A (en) * 1986-01-27 1993-12-14 Mitsubishi Denki Kabushiki Kaisha Method of producing semiconductor device
JP2001257227A (en) * 2000-03-08 2001-09-21 Oki Electric Ind Co Ltd Method of manufacturing semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5270253A (en) * 1986-01-27 1993-12-14 Mitsubishi Denki Kabushiki Kaisha Method of producing semiconductor device
JPS6417449A (en) * 1987-07-10 1989-01-20 Fuji Electric Co Ltd Formation of bump electrode of semiconductor device
US5108950A (en) * 1987-11-18 1992-04-28 Casio Computer Co., Ltd. Method for forming a bump electrode for a semiconductor device
JP2001257227A (en) * 2000-03-08 2001-09-21 Oki Electric Ind Co Ltd Method of manufacturing semiconductor device

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