JPS5250168A - Construction of semiconductor device - Google Patents

Construction of semiconductor device

Info

Publication number
JPS5250168A
JPS5250168A JP50125975A JP12597575A JPS5250168A JP S5250168 A JPS5250168 A JP S5250168A JP 50125975 A JP50125975 A JP 50125975A JP 12597575 A JP12597575 A JP 12597575A JP S5250168 A JPS5250168 A JP S5250168A
Authority
JP
Japan
Prior art keywords
construction
semiconductor device
projection
adhesiveness
impair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50125975A
Other languages
Japanese (ja)
Inventor
Hiroyuki Miyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP50125975A priority Critical patent/JPS5250168A/en
Publication of JPS5250168A publication Critical patent/JPS5250168A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE: A construction whereby a projection may be formed without impair ing the adhesiveness and conductivity of the projection and the electrode part of a semiconductor device by a conventional process is obtained.
COPYRIGHT: (C)1977,JPO&Japio
JP50125975A 1975-10-21 1975-10-21 Construction of semiconductor device Pending JPS5250168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50125975A JPS5250168A (en) 1975-10-21 1975-10-21 Construction of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50125975A JPS5250168A (en) 1975-10-21 1975-10-21 Construction of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5250168A true JPS5250168A (en) 1977-04-21

Family

ID=14923612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50125975A Pending JPS5250168A (en) 1975-10-21 1975-10-21 Construction of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5250168A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50126380A (en) * 1974-03-26 1975-10-04

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50126380A (en) * 1974-03-26 1975-10-04

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