JPH1187355A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To relax current density around an emitter region. SOLUTION: A second conductive emitter region 15 is formed inside a first conductive base region 14, and a first conductive semiconductor region 30 is selectively formed inside the emitter region 15. The first conductive semiconductor region 30 forms a pattern without making a contact with an emitter base junction but is extended along the entire periphery of the emitting base junction and forms an ohmic emitter electrode 18 which bridges between the first conductive semiconductor region 30 and the emitter region 15 surrounded by the first conductive semiconductor region 30.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a bipolar transistor or a semiconductor integrated circuit having a bipolar transistor, and a method of manufacturing the same.

[0002]

2. Description of the Related Art As shown in a sectional view of FIG. 9, for example, a conventional bipolar transistor has a semiconductor substrate 100 of a first conductivity type, for example, a p-type Si substrate, and a high conductivity of a second conductivity type, for example, an n-type. Collector buried region 101 with impurity concentration
Is formed thereon, and a semiconductor substrate 103 formed by epitaxially growing a semiconductor layer 102 of the second conductivity type, for example, a Si layer is prepared. Then, a first conductivity type, for example, a p-type base region 104 is formed on the collector region 101 of the semiconductor layer 102, and a second conductivity type, for example, an n-type emitter region 105 is selectively formed thereon. Become.

The semiconductor layer 102 of the semiconductor substrate 103
From the surface (hereinafter referred to as one main surface) of the collector electrode extraction region 106 reaching the collector buried region 101B.
Is formed thereon, a collector electrode 107 is ohmically deposited thereon, an emitter electrode 108 is ohmically deposited on the emitter region 105 facing one main surface, and a base electrode is formed on the base region 104 on the outer periphery thereof. 109 is attached ohmic.

[0004]

In the above-described semiconductor device having the structure shown in FIG. 9, in the base region 104 immediately below the emitter region 105, the distance between the emitter and the collector is set to realize a high current gain. Is narrow and has a low impurity concentration, the electrical resistance here is relatively high. Therefore, when a current flows between the emitter and the base, the voltage drop is remarkable here. As a result, the peripheral region 105b of the emitter region 105
Is different from the potential difference between the emitter region 105 and the base region 104.
Is larger than the potential difference between the central region 105a and the base region 104, so that almost no current flows in the central portion of the emitter region 105, and the current density in the peripheral region 105b of the emitter region 105 increases. A phenomenon called crowding occurs. As described above, when the current is concentrated on the peripheral region 105b of the emitter region 105 due to the emitter crowding phenomenon, the emitter-base junction is likely to be destroyed in the peripheral portion, and the transistor is likely to be destroyed.

In order to avoid the above-described voltage drop, a transistor has been proposed in which the lateral width Wb of the emitter region 105 in FIG. 9 is actually reduced (US Pat. No. 4,506,280). . However, in this case, in order to avoid a reduction in the area of the emitter region 105 due to a reduction in the lateral width Wb of the emitter region 105, it is necessary to increase the length of the emitter region 105 (in the depth direction with respect to the paper surface). However, when the length of the emitter region 105 is increased, the degree of freedom in laying out the transistor in a limited region is significantly impaired.

In the present invention, the peripheral region 1 of the emitter region 105 is not reduced without reducing the lateral width Wb of the emitter region 105.
Provided are a semiconductor device and a method for manufacturing the same, which alleviate the current density in the semiconductor device 05b.

[0007]

According to the present invention, there is provided a semiconductor device comprising:
An emitter region of the second conductivity type is formed in the base region of the first conductivity type, and a semiconductor region of the first conductivity type is selectively formed in the emitter region. Formed in a pattern that does not contact the base-to-base junction and extends along the entire periphery of the emitter-base junction, that is, a pattern surrounding the central portion of the emitter region by the semiconductor region of the first conductivity type; An emitter electrode is formed ohmicly over the first conductivity type semiconductor region and over the emitter region surrounded by the first conductivity type semiconductor region.

In the method of manufacturing a semiconductor device according to the present invention, a first conductive type base region is formed facing one main surface of a semiconductor substrate, and a second conductive type base region is formed in the base region. Forming a first conductivity type semiconductor region facing one main surface in the emitter region, and forming the emitter electrode by extending the first conductivity type semiconductor region to the emitter region; The semiconductor region of the first conductivity type is formed in a pattern that does not contact the junction between the emitter and the base and extends along the entire region of the periphery of the junction between the emitter and the base. On the area and
An object semiconductor device is obtained by forming ohmicly over an emitter region surrounded by a semiconductor region of a first conductivity type.

According to the configuration of the present invention described above, since the emitter region is formed so as to surround the center region of the emitter region by a semiconductor region of a different conductivity type, the emitter region goes from the center region to the peripheral region in the emitter region. By increasing the distributed resistance with respect to the emitter current, the current flowing toward the emitter peripheral region can be suppressed, and the current density in this peripheral region can be relaxed. Avoidance of destruction, and therefore, improved reliability.

According to the present invention, the current density around the emitter region can be reduced without reducing the width of the emitter region. Therefore, the degree of freedom in layout of the semiconductor device by increasing the emitter length can be achieved. Can be avoided.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a semiconductor device according to the present invention will be described. A schematic diagram of an example of a semiconductor device according to the present invention will be described with reference to a schematic sectional view of FIG.

In this example, an npn-type transistor is formed. In this case, a second conductivity type, in this example, an n-type collector region 11 and a high impurity concentration collector buried region 11B are formed in a semiconductor substrate 13. Is formed.
On the collector region 11, a p-type base region 14 of the first conductivity type, in this example, p-type is formed.
Optionally, emitter region 1 of the second conductivity type, in this example, n-type
5 are formed.

In the emitter region 15, a semiconductor region 30 of a first conductivity type, in this example, a p-type semiconductor is selectively formed. The semiconductor region 30 of the first conductivity type has an emitter
Without contacting the base-to-base junction
It is formed in a pattern extending along the entire peripheral region of the base-to-base junction, that is, a ring-shaped pattern surrounding the central region 15a of the emitter. Here, the ring-shaped pattern may be a circular or square door. Also,
This semiconductor region 30 is formed by an emitter-base junction Jeb.
So that it does not touch the
The emitter region 15 is located inside the periphery with a required distance d from the periphery, the depth is formed smaller than the depth of the emitter region 15, and the bottom thereof is formed between the emitter and base junction Jeb. Is formed such that a small gap 15c having a required height h is generated. The emitter electrode 18 is formed ohmicly over the semiconductor region 30 of the first conductivity type and the emitter region 15 surrounded by the semiconductor region 30 of the first conductivity type, that is, the center region 15a.

Then, a base electrode 19 is ohmic-coated on the base region 14 at the outer peripheral portion of the emitter region 15. Further, from the surface of the semiconductor layer 12 of the semiconductor substrate 13,
A collector electrode extraction region 16 reaching the collector buried region 11 is formed, on which a collector electrode 17 is ohmic-deposited.

According to the structure of the semiconductor device of the present invention,
The central region 15a of the emitter region 15 is surrounded by the semiconductor region 30 of the first conductivity type.
The central region 15a and the peripheral region 15b are configured to communicate with the peripheral region 15b through the small gap 15c.
Is large, the voltage drop is large in this region, and the potential difference between the peripheral region 15b of the emitter region 15 and the base region 14 is reduced.
5 can be made smaller than the potential difference between the central region 15a and the base region 14, so that the current concentration can be reduced in the peripheral region 15b of the emitter region 15, that is, the current density can be reduced.

Next, an example of a specific manufacturing method for manufacturing the semiconductor device of the present invention shown in FIG. 1 will be described. It should be noted that the semiconductor device of the present invention is not limited to the examples described below, and various other materials can be changed.

As shown in FIG. 2, a first conductivity type, in this example, a p-type Si semiconductor substrate 10 is prepared, and a mask layer 20 for the next step and impurity diffusion is formed thereon. This mask layer 20 is made entirely of, for example, SiO _{2 and} has a thickness of 330 nm.
To the collector buried region forming part,
The opening 20w is formed by etching using photolithography. Thereafter, an impurity layer 21, for example, an SbSG layer (antimony silicate glass) is formed on the entire surface to a thickness of about 100 nm, and is heated at, for example, 1200 ° C. for 100 minutes. Impurities are diffused to form a collector buried region 11 of the second conductivity type, for example, n-type.

Next, as shown in FIG.
After the upper impurity layer 21 and the mask layer 20 are removed, the same conductivity type as the collector buried region 11, for example, n-type Si, is epitaxially grown on the semiconductor substrate 10.
The semiconductor layer 12 is epitaxially grown to a thickness of, for example, 2.3 μm.

Next, as shown in FIG. 4, an insulating layer 22 of, for example, SiO ₂ is formed on the surface of the semiconductor layer 12 by thermal oxidation, for example, to a thickness of 20 nm. The protective film 23 made of Si ₃ N _{4 has} a thickness of, for example, 50
nm.

Next, as shown in FIG. 5, using a photoresist mask (not shown), impurities of the first conductivity type, for example, phosphorus ions are applied at an energy of 70 keV for 5.
By implanting at a dose of 0 × 10 ¹⁵ / cm ² ,
An n-type collector electrode take-out region 16 for lowering the collector electrode take-out resistance is formed to a depth reaching the collector buried region 11.

Thereafter, after the photoresist is removed, impurity ions of the second conductivity type, for example, boron ions are again used at a dose of 6.0 × 10 ¹⁵ / cm at an energy of 50 keV by using a photoresist mask (not shown). By implanting at a dose of ² , a p-type isolation 24 is formed.

Thereafter, after removing the photoresist, for example, at 1100 ° C. for the purpose of activating the implanted impurity ions.
Is performed for 65 minutes, and then the protective film 23 is removed.

As shown in FIG. 6, an impurity of the second conductivity type, for example, boron ion is selectively applied with a photoresist (not shown) using a mask (not shown) to 1.0 × 10 ¹⁴ / cm ² at an energy of 35 keV. To form a base region 14.

Thereafter, the photoresist is removed, and thermal diffusion is performed, for example, at 900 ° C. for 30 minutes to activate impurity ions.

As shown in FIG. 7, an impurity having a conductivity type different from that of the base region 14, for example, As ions, is selectively applied on the base region 14 using a mask (not shown) made of a photoresist at an energy of 50 keV. 5.0 × 10
^The emitter region 15 is formed by implanting a dose of ¹⁵ / cm ² . After removing the photoresist, thermal diffusion is performed, for example, at 1000 ° C. for 30 minutes for activation.

As shown in FIG. 8, a first conductivity type semiconductor region 30 is formed in the emitter region 15. As shown in FIG. 8, a mask (not shown) made of a photoresist is formed on the semiconductor region 30 to selectively apply, for example, boron ions to the semiconductor region 30 at an energy of 40 keV and 1.0 × 10 ¹⁶ / cm ^2.
Is formed by injecting with a dose amount of

The semiconductor region 30 of the first conductivity type is located at a position where it does not contact the emitter-base junction Jeb, that is, at a position where a required distance d is maintained inside the periphery of the emitter region 15, and It is formed so as to hold a small gap 15c with a height h between the bottom and the bottom of the junction Jeb. In addition, the first conductivity type semiconductor region 30
Are formed in a pattern extending along the entire area of the peripheral of the emitter-base junction.

After that, the photoresist is removed, and thermal diffusion is performed, for example, at 800 ° C. for 30 minutes for activation.

Next, as shown in FIG. 1, on the base region 14 around the emitter region 15 of the insulating layer 22, on the collector electrode extraction region 16, and on the emitter region 15,
Each electrode is formed. That is, an electrode contact window is formed, and a collector electrode 17, a base electrode 19, and an emitter electrode 18 are formed through these contact windows. The emitter electrode 18 is formed ohmic across the semiconductor region 30 of the first conductivity type and the emitter region 15 surrounded by the semiconductor region 30 of the first conductivity type.

The electrodes 17, 18, and 19 are, for example, A
1 can be formed at the same time by forming the entire surface by vapor deposition or the like and performing pattern etching by photolithography. Thus, the intended bipolar transistor is formed.

Although only a single transistor is shown in the figure, other integrated circuits may be formed by forming other transistors and other circuit elements in a region separated by the isolation region 24. it can. However, the invention is not limited to integrated circuits,
The present invention can be applied to a semiconductor device using a single transistor.

In the above-described example, the case where an npn-type transistor is obtained has been described. However, the present invention can be applied to a pnp-type transistor, and is limited to the manufacturing conditions shown in the above-described embodiment. Instead, various conditions and materials can be changed.

[0033]

According to the present invention, the central region 15a of the emitter region 15 is surrounded by the semiconductor region 30 of the first conductivity type, and the central region 15a communicates with the peripheral region 15b through the small gap 15c. It has been
The substantial resistance between the central region 15a and the peripheral region 15b is large, and the voltage drop is large in this region, and the potential difference between the peripheral region 15b of the emitter region 15 and the base region 14 is reduced by the central region 15a of the emitter region 15. Can be made smaller than the potential difference between
In the peripheral region 15b of the emitter region 15, the current concentration can be reduced, that is, the current density can be reduced.
As a result, it is possible to effectively avoid the occurrence of junction breakdown and the like,
The reliability of the semiconductor device can be improved.

Further, according to the present invention, the concentration of current density around the emitter region can be reduced without reducing the width of the emitter region, thereby avoiding a reduction in layout flexibility of the semiconductor device. be able to.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of an example of a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view of a main part of a manufacturing process of an example of a semiconductor device.

FIG. 3 is a cross-sectional view of a main part of a manufacturing process of an example of a semiconductor device.

FIG. 4 is a cross-sectional view of a main part of a manufacturing process of an example of a semiconductor device.

FIG. 5 is a cross-sectional view of a main part of a manufacturing process of an example of a semiconductor device.

FIG. 6 is a sectional view of a main part of a manufacturing process of an example of a semiconductor device.

FIG. 7 is a cross-sectional view of a main part of a manufacturing process of an example of a semiconductor device.

FIG. 8 is a sectional view of a main part of a manufacturing process of an example of the semiconductor device of the present invention.

FIG. 9 is a schematic sectional view of an example of a conventional semiconductor device.

[Explanation of symbols]

10, 100: semiconductor substrate, 11, 101: collector region, 11B, 101B: collector buried region, 12,
102: semiconductor layer, 13, 103: semiconductor substrate, 14,
104: base region, 15, 105: emitter region, 1
5a, 105a... Central region of emitter region, 15b, 1
05b: peripheral region of emitter region, 15c: small gap, 1
6, 106: Collector electrode extraction region, 17, 107
... collector electrode, 18, 108 ... emitter electrode, 19,
109: base electrode, 20: mask layer, 21: impurity layer, 22: insulating layer, 23: protective film, 30: semiconductor layer

Claims (2)

[Claims] A first conductivity type emitter region formed in the first conductivity type base region; a first conductivity type semiconductor region selectively formed in the emitter region; Is formed in a pattern that does not contact the junction between the emitter and the base and extends along the entire periphery of the periphery of the junction between the emitter and the base. A semiconductor device, wherein an emitter electrode is formed in an ohmic manner over the emitter region surrounded by a semiconductor region of one conductivity type. 2. A step of forming a first conductivity type base region facing one main surface of the semiconductor substrate, and forming a second conductivity type emitter region in the base region facing the one main surface. Forming a first conductive type semiconductor region facing the one main surface in the emitter region; and forming an emitter electrode across the first conductive type semiconductor region with the emitter region. Forming the semiconductor region of the first conductivity type in a pattern that does not contact the junction between the emitter and the base and extends along the entire periphery of the periphery of the junction between the emitter and the base. A method of manufacturing a semiconductor device, wherein an emitter electrode is formed ohmicly over the first conductivity type semiconductor region and over the emitter region surrounded by the first conductivity type semiconductor region. .