JPH1174641A - Multilayer wiring board - Google Patents
Multilayer wiring boardInfo
- Publication number
- JPH1174641A JPH1174641A JP23463797A JP23463797A JPH1174641A JP H1174641 A JPH1174641 A JP H1174641A JP 23463797 A JP23463797 A JP 23463797A JP 23463797 A JP23463797 A JP 23463797A JP H1174641 A JPH1174641 A JP H1174641A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- wiring board
- wiring
- core
- wiring circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は各種多層配線基板及
び半導体素子収納用パッケージ等に好適な、特にビルド
アップ法により形成された多層配線基板に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board suitable for various multilayer wiring boards and packages for housing semiconductor elements, and more particularly to a multilayer wiring board formed by a build-up method.
【0002】[0002]
【従来の技術】近年、電子機器の高性能化、小型化には
目ざましいものがあり、携帯情報端末の発達や、コンピ
ューターを持ち運んで操作するいわゆるモバイルコンピ
ューティングの普及によって、このような電子機器に用
いられる多層配線基板には、更に小型化、薄型化かつ高
精細化等が要求されている。2. Description of the Related Art In recent years, there has been a remarkable increase in the performance and miniaturization of electronic devices. Due to the development of portable information terminals and the spread of so-called mobile computing in which computers are carried and operated, such electronic devices have become increasingly popular. The multilayer wiring board used is required to be further reduced in size, thickness, and definition.
【0003】一方、通信機器に代表されるような高速動
作が求められる電子機器では、その普及に伴って高い周
波数の信号に対して正確なスイッチングが可能であるこ
と等の要求を満足する多層配線基板が求められている。On the other hand, in electronic equipment such as communication equipment which requires high-speed operation, a multilayer wiring satisfying a requirement that accurate switching can be performed for a high frequency signal with the spread of the electronic equipment. There is a need for a substrate.
【0004】このような諸要求に応えるためには、多層
配線基板の配線を高密度化することが必要とされるが、
従来の銅張積層板にドリルを用いて穿孔し、バイアホー
ル導体並びに配線パターンを形成して積層するという多
層プリント配線基板では、小径のスルーホールを加工す
るドリル径に限界があること、及び多層化による高アス
ペクト比のスルーホールの信頼性に限界があること、絶
縁層を薄く形成するために製造コストが増大すること等
から、高密度化と製造コストの低減に限界があった。In order to meet such demands, it is necessary to increase the wiring density of the multilayer wiring board.
The conventional copper-clad laminates are drilled using a drill to form via-hole conductors and wiring patterns, and then laminated to form a multilayer printed wiring board. However, there is a limit to the reliability of a through hole having a high aspect ratio due to the increase in the manufacturing cost, and an increase in manufacturing cost due to the formation of a thin insulating layer.
【0005】そこで、前記欠点を解消して配線の高密度
化と、製造コストの低減を図る一つの手段として、絶縁
基板上に配線回路膜と絶縁膜を交互に形成するという工
程を繰り返して多層配線基板を製造するビルドアップ法
が知られている。Therefore, as one means for solving the above-mentioned drawbacks and increasing the wiring density and reducing the manufacturing cost, a process of alternately forming a wiring circuit film and an insulating film on an insulating substrate is repeated to form a multilayer. A build-up method for manufacturing a wiring board is known.
【0006】かかるビルドアップ法は、例えば、銅箔を
エッチングして形成した配線回路層を有する両面銅張ガ
ラスエポキシ基板をコアとし、該両面銅張ガラスエポキ
シ基板の表面に感光性エポキシ樹脂を塗布し、バイアホ
ールを形成する部分の感光性エポキシ樹脂を露光、現像
して除去した後、得られた絶縁膜上に無電解メッキ法や
電解メッキ法により銅の被覆層を形成し、該被覆層をエ
ッチングすることによりバイアホール導体及び配線回路
膜を形成する。In such a build-up method, for example, a double-sided copper-clad glass epoxy substrate having a wiring circuit layer formed by etching a copper foil is used as a core, and a photosensitive epoxy resin is applied to the surface of the double-sided copper-clad glass epoxy substrate. Then, after exposing and developing and exposing the photosensitive epoxy resin in a portion for forming a via hole, a copper coating layer is formed on the obtained insulating film by an electroless plating method or an electrolytic plating method, and the coating layer is formed. Is etched to form via-hole conductors and wiring circuit films.
【0007】次いで、前記感光性エポキシ樹脂による絶
縁膜の形成と、銅の被覆層によるバイアホール導体及び
配線回路膜の形成を繰り返して多層化し、更に、ドリル
等によりスルーホール用の貫通孔を設け、該貫通孔内に
めっき層を形成して層間の配線回路膜を電気的に接続す
ることにより多層配線基板とするものである(特開平9
−64514号公報参照)。Next, the formation of the insulating film by the photosensitive epoxy resin and the formation of the via-hole conductor and the wiring circuit film by the copper coating layer are repeated to form a multilayer, and further, a through hole for a through hole is provided by a drill or the like. A multi-layer wiring board is formed by forming a plating layer in the through hole and electrically connecting the wiring circuit films between the layers (Japanese Patent Application Laid-Open No. Hei 9 (1994)).
-64514).
【0008】[0008]
【発明が解決しようとする課題】しかしながら、前記ビ
ルドアップ法もその普及に伴って以下のような課題が明
かとなってきた。However, with the spread of the build-up method, the following problems have become apparent.
【0009】即ち、前記ビルドアップ法で形成した多層
配線基板は、コアの両面銅張ガラスエポキシ基板等を成
す絶縁層とビルドアップ法で形成した絶縁膜や配線回路
膜との密着性が劣るという課題があり、特にアラミド不
織布に樹脂を含浸させて成る絶縁基板をコアとするもの
では、該絶縁基板の熱膨張率が低いため、その表面に形
成した絶縁膜を成す樹脂との熱膨張差が大きく、ビルド
アップ法で形成した前記絶縁膜や配線回路膜が剥離し易
いという課題があった。In other words, the multilayer wiring board formed by the build-up method has poor adhesion between the insulating layer forming the double-sided copper-clad glass epoxy substrate or the like of the core and the insulating film or wiring circuit film formed by the build-up method. There is a problem, particularly in the case where the core is an insulating substrate formed by impregnating a resin into an aramid nonwoven fabric, since the thermal expansion coefficient of the insulating substrate is low, the difference in thermal expansion from the resin forming the insulating film formed on the surface thereof is low. There is a problem that the insulating film and the wiring circuit film formed by the build-up method are easily peeled off.
【0010】[0010]
【発明の目的】本発明は前記課題を解決するために成さ
れたもので、その目的は、ビルドアップ法で形成した絶
縁膜や配線回路膜とコアを成す配線基板との密着力が向
上した、情報通信分野、特にモバイルコンピューティン
グ関連機器の配線基板として最適な、配線の高密度化を
実現した多層配線基板を提供することにある。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to improve the adhesion between an insulating film or a wiring circuit film formed by a build-up method and a wiring substrate forming a core. It is an object of the present invention to provide a multilayer wiring board which realizes a high-density wiring, which is optimal as a wiring board for information and communication fields, particularly for mobile computing related devices.
【0011】[0011]
【課題を解決するための手段】本発明者は前記課題に鑑
み鋭意検討した結果、コアを成す配線基板の絶縁層に分
子量及び/又は硬化温度に大きな差がある樹脂を混合し
て用いることにより、硬化時にその表面が微小な突起を
生じ、この絶縁層表面にビルドアップ法で絶縁膜や配線
回路膜を形成すると密着力が向上することを見いだし、
本発明に至った。Means for Solving the Problems The present inventor has made intensive studies in view of the above problems, and as a result, has found that a resin having a large difference in molecular weight and / or curing temperature is mixed and used in an insulating layer of a wiring substrate forming a core. When hardening, the surface produces minute projections, and it is found that if an insulating film or a wiring circuit film is formed on this insulating layer surface by a build-up method, the adhesion is improved,
The present invention has been reached.
【0012】即ち、本発明の多層配線基板は、分子量及
び/又は硬化温度が異なる少なくとも2種類の樹脂から
成る表面粗さが0.1μm以上である絶縁層と、配線回
路層とから成る配線基板をコアとし、該コアの表面に絶
縁膜と配線回路膜を順次ビルドアップ法で形成して成る
ことを特徴とするものであり、特に、より望ましくは前
記樹脂はその分子量が5倍以上及び/又は硬化温度が1
0℃以上異なるものであること、更に、コアを構成する
絶縁層が平均粒径0.2〜10μmのセラミック粉末を
10〜50体積%含有すること、また、前記コアの配線
基板は、少なくともその表面に形成された配線導体層が
樹脂フィルム上に作製した配線導体層を転写したもので
あることを特徴とするものである。That is, the multilayer wiring board of the present invention is a wiring board comprising an insulating layer made of at least two kinds of resins having different molecular weights and / or curing temperatures and having a surface roughness of 0.1 μm or more, and a wiring circuit layer. , And an insulating film and a wiring circuit film are sequentially formed on the surface of the core by a build-up method. In particular, more preferably, the resin has a molecular weight of 5 times or more and / or Or the curing temperature is 1
0 ° C. or more, the insulating layer constituting the core contains 10 to 50% by volume of ceramic powder having an average particle size of 0.2 to 10 μm, and the wiring substrate of the core has at least The wiring conductor layer formed on the surface is obtained by transferring the wiring conductor layer formed on a resin film.
【0013】[0013]
【作用】本発明の多層配線基板によれば、分子量及び/
又は硬化温度が異なる少なくとも2種類の樹脂で絶縁層
を形成することから、樹脂の未硬化状態では、高分子成
分と低分子成分がその含有量の多少により海状と島状に
分布するいわゆる海島構造の組織を成しており、この樹
脂を第一の硬化温度に保持すると一部成分の硬化が始ま
り、樹脂は一部硬化した樹脂と未硬化の樹脂との混合物
となり、更にこの混合物を第二の硬化温度に保持すると
未硬化の樹脂の硬化が始まり、この時、硬化する樹脂成
分に押されるようにして最初に硬化していた樹脂が表面
にせりあがり、表面に凹凸が形成されることになる。According to the multilayer wiring board of the present invention, the molecular weight and / or
Alternatively, since the insulating layer is formed of at least two kinds of resins having different curing temperatures, in the uncured state of the resin, a so-called sea-island in which a high-molecular component and a low-molecular component are distributed in a sea-like and island-like shape depending on the content thereof. When the resin is maintained at the first curing temperature, curing of some components starts, the resin becomes a mixture of a partially cured resin and an uncured resin, and this mixture is further divided into a first composition and a second composition. When the resin is kept at the second curing temperature, the curing of the uncured resin starts, and at this time, the first cured resin rises to the surface by being pressed by the resin component to be cured, and irregularities are formed on the surface become.
【0014】このような作用は、前記樹脂にセラミック
粉末を混合させると更に顕著となり、その結果、樹脂表
面の凹凸がビルドアップ法で形成される感光性樹脂によ
る絶縁膜や、メッキによる導体層の密着力を向上し、特
に、50μm以下の微細配線の密着強度向上に有効に作
用する。Such an effect becomes more remarkable when a ceramic powder is mixed with the resin, and as a result, an insulating film made of a photosensitive resin in which irregularities on the resin surface are formed by a build-up method, or a conductive layer formed by plating. It is effective for improving the adhesive strength, particularly for improving the adhesive strength of fine wiring of 50 μm or less.
【0015】[0015]
【発明の実施の形態】以下、本発明の多層配線基板につ
いて一実施例を図面に基づき詳述する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the multilayer wiring board of the present invention will be described in detail with reference to the drawings.
【0016】図1は、本発明の多層配線基板の一実施例
を示す断面図である。図において、1は少なくとも2種
類の樹脂から成る絶縁層2と、配線回路層3とから成る
配線基板をコア4とし、コア4を成す配線基板の表面に
ビルドアップ法で絶縁膜5と配線回路膜6を順次積層し
て形成した多層配線基板である。FIG. 1 is a sectional view showing an embodiment of the multilayer wiring board of the present invention. In the drawing, reference numeral 1 denotes a wiring board composed of an insulating layer 2 made of at least two kinds of resins and a wiring circuit layer 3 as a core 4, and an insulating film 5 and a wiring circuit formed on a surface of the wiring board forming the core 4 by a build-up method. This is a multilayer wiring board formed by sequentially laminating films 6.
【0017】本発明において前記分子量及び/又は硬化
温度が異なる樹脂としては、例えば、ポリフェニレンエ
ーテル(PPE)やビスマレイミドトリアジン(BTレ
ジン)、エポキシ樹脂、ポリイミド樹脂、フッ素樹脂、
フェノール樹脂等の熱硬化性樹脂や熱可塑性樹脂が使用
でき、特に耐熱性に優れ、吸湿性が低く、高周波領域で
の電気特性に優れるという点からはイミド系樹脂が最適
である。In the present invention, the resins having different molecular weights and / or curing temperatures include, for example, polyphenylene ether (PPE), bismaleimide triazine (BT resin), epoxy resin, polyimide resin, fluororesin,
A thermosetting resin such as a phenol resin or a thermoplastic resin can be used. In particular, an imide-based resin is optimal in terms of excellent heat resistance, low hygroscopicity, and excellent electric characteristics in a high frequency range.
【0018】また、前記樹脂の分子量は、分子量のみで
論じるならば少なくとも2種類の樹脂の差が5倍未満の
場合には、各樹脂の硬化時の変形はほぼ同量で進行する
ため樹脂表面に前述のような突起の形成は難しい場合が
あり、表面粗さとして0.1μmを越えない場合には、
硬化温度に差をつけるか、あるいはSiO2 粉末等、セ
ラミック粉末を適宜添加すれば良い。If the difference in the molecular weight of the above resins is less than five times if only the molecular weight is discussed, the deformation of each resin at the time of curing proceeds with substantially the same amount. In some cases, it is difficult to form the projections as described above. If the surface roughness does not exceed 0.1 μm,
The curing temperature may be varied, or ceramic powder such as SiO 2 powder may be appropriately added.
【0019】そして、本発明ではコアの絶縁層の表面粗
さが0.1μm未満では、その表面に形成した絶縁膜や
配線回路膜等のビルドアップ層が、加熱冷却の繰り返し
によって剥離し易くなり、前記表面粗さが粗くなればな
る程、ビルドアップ層の密着力は高くなるが、あまり粗
くなるとビルドアップ層の絶縁膜用の樹脂との間に気泡
が入り易くなって密着力に影響を及ぼすため、表面粗さ
はRaで0.5〜3μm程度がより良好である。In the present invention, if the surface roughness of the insulating layer of the core is less than 0.1 μm, the build-up layer such as an insulating film and a wiring circuit film formed on the surface is easily peeled off by repeated heating and cooling. The higher the surface roughness is, the higher the adhesion of the build-up layer is. However, if the surface is too rough, air bubbles easily enter between the build-up layer and the resin for the insulating film, thereby affecting the adhesion. Therefore, the surface roughness is more preferably about 0.5 to 3 μm in Ra.
【0020】また、前記表面粗さを粗くするには分子量
の異なる樹脂を混合して使用することも有効であり、こ
れは硬化する時に混合された樹脂がそれぞれ移動しなが
ら硬化することによるものである。It is also effective to use a mixture of resins having different molecular weights in order to increase the surface roughness. This is because the mixed resins move and cure while moving. is there.
【0021】しかし、前記分子量の差が500倍を超え
ると樹脂同士の均一な混合が困難となり、長時間の機械
的混合が必要となる。However, if the difference in molecular weight exceeds 500 times, uniform mixing of the resins becomes difficult, and long-term mechanical mixing is required.
【0022】従って、本発明における樹脂の分子量の差
は、5〜500倍程度が望ましく、特に必要な表面粗さ
を安定して得るためには10〜500倍が望ましく、更
に50〜100倍が最適となる。Therefore, the difference in the molecular weight of the resin in the present invention is preferably about 5 to 500 times, particularly preferably 10 to 500 times, and more preferably 50 to 100 times in order to stably obtain the required surface roughness. It will be optimal.
【0023】次に、前記樹脂の硬化温度の差が10℃未
満の場合には、各樹脂の硬化はほぼ同時に進行するた
め、分子量を変えるか、セラミック粉末を混合しなけれ
ば前述のような表面の突起は形成されず、表面粗さは
0.1μmを超えない。Next, when the difference between the curing temperatures of the resins is less than 10 ° C., the curing of each resin proceeds almost simultaneously. Therefore, if the molecular weight is not changed or the ceramic powder is not mixed, the above-mentioned surface is hardened. Are not formed, and the surface roughness does not exceed 0.1 μm.
【0024】逆に、前記硬化温度の差が100℃を超え
ると、硬化温度の差が大きくなり過ぎ、硬化温度が高い
樹脂の硬化中に硬化温度が低い樹脂にクラックや分解を
生じたりする恐れがある。Conversely, if the difference between the curing temperatures exceeds 100 ° C., the difference between the curing temperatures becomes too large, and the resin having a low curing temperature may crack or decompose during the curing of the resin having a high curing temperature. There is.
【0025】従って、本発明における樹脂の硬化温度の
差は10〜100℃が望ましく、特にかかる樹脂から成
る絶縁基板の変形や樹脂の偏析を防止する点からは20
〜100℃が望ましく、更に30〜60℃が最適であ
る。Therefore, the difference in the curing temperature of the resin in the present invention is desirably 10 to 100 ° C., and particularly, from the viewpoint of preventing deformation of the insulating substrate made of such a resin and segregation of the resin.
-100 ° C is desirable, and more preferably 30-60 ° C.
【0026】また、前記樹脂の硬化はそれぞれの樹脂の
硬化が効率良く行われるように、それぞれの硬化温度で
少なくとも5分間保持することが望ましい。It is preferable that the resin is cured at each curing temperature for at least 5 minutes so that the respective resins are cured efficiently.
【0027】更に、分子量の異なる樹脂の混合、硬化温
度の異なる樹脂の混合は、それぞれ単独でも有効である
が、単独では樹脂の取扱い性が劣る等、製造工程上の困
難を生じることがあり、分子量と硬化温度は共に差を設
けた方が効果的である。Further, the mixing of resins having different molecular weights and the mixing of resins having different curing temperatures are effective even when used alone, but may cause difficulties in the production process such as inferior handleability of the resin alone. It is more effective to provide a difference between the molecular weight and the curing temperature.
【0028】以上の結果、分子量及び/又は硬化温度に
大きな差がある少なくとも2種類の樹脂を混合すること
で、硬化時にその表面に微細な突起が形成され、該突起
を有する表面に感光性樹脂や樹脂付き銅箔を密着させる
とアンカー効果によって表面に樹脂が強固に密着し、コ
アの配線基板とビルドアップ法により形成した絶縁膜や
配線回路膜との接続が強固になり信頼性を向上させるこ
とができる。As a result, by mixing at least two kinds of resins having a large difference in molecular weight and / or curing temperature, fine projections are formed on the surface during curing, and the photosensitive resin is formed on the surface having the projections. When copper foil with resin is adhered, the resin adheres firmly to the surface by the anchor effect, and the connection between the core wiring board and the insulating film or wiring circuit film formed by the build-up method is strengthened, improving reliability. be able to.
【0029】本発明では、コアの配線基板を構成する絶
縁層は、分子量が5倍以上及び/又は硬化温度が10℃
以上異なる少なくとも2種の樹脂を混合して使用するこ
とにより表面粗さを0.1μm以上とすることが重要で
ある。In the present invention, the insulating layer constituting the core wiring board has a molecular weight of 5 times or more and / or a curing temperature of 10 ° C.
It is important that the surface roughness is 0.1 μm or more by using a mixture of at least two different resins.
【0030】一方、本発明の前記コアの絶縁層には前記
有機樹脂に対して無機質フィラーを複合化させても良
く、該無機質フィラーとしては、シリカ(SiO2 )、
アルミナ(Al2 O3 )、窒化アルミニウム(Al
N)、炭化珪素(SiC)等の公知のセラミック粉末が
使用でき、該セラミック粉末は粗大粒子が原因となって
配線回路膜が断線するのを防止する点からは、その平均
粒径が0.2〜10μmであることがより望ましく、そ
の含有量も10〜50体積%の範囲内がより好適であ
る。On the other hand, in the insulating layer of the core of the present invention, an inorganic filler may be compounded with the organic resin, and the inorganic filler may be silica (SiO 2 ),
Alumina (Al 2 O 3 ), aluminum nitride (Al
N), silicon carbide (SiC) and the like can be used. The ceramic powder has an average particle size of 0. 0 to prevent disconnection of the wiring circuit film due to coarse particles. The thickness is more preferably 2 to 10 μm, and the content thereof is more preferably in the range of 10 to 50% by volume.
【0031】更に、前記有機樹脂と複合化する材料とし
ては、ガラスクロスやアラミド不織布に樹脂を含浸させ
たシート(プリプレグ)を用いても良く、アラミド不織
布に熱硬化性等の樹脂を含浸させ、含浸した樹脂の未硬
化状態または半硬化状態(Bステージ)でバイアホール
内への導体ペーストを充填し、バイアホール導体に金属
箔から成る配線回路層が形成された転写シートからの転
写によって配線回路層を形成することもでき、前記絶縁
基板にアラミド不織布を含有させると絶縁層あるいは配
線基板全体の強度を高めることができる。Further, as a material to be combined with the organic resin, a glass cloth or a sheet (prepreg) in which an aramid nonwoven fabric is impregnated with a resin may be used, and the aramid nonwoven fabric is impregnated with a resin such as a thermosetting resin. A wiring circuit is formed by filling a conductive paste into a via hole in an uncured state or a semi-cured state (B stage) of an impregnated resin and transferring the via hole conductor from a transfer sheet in which a wiring circuit layer made of a metal foil is formed. A layer can also be formed. When the aramid nonwoven fabric is contained in the insulating substrate, the strength of the insulating layer or the entire wiring substrate can be increased.
【0032】また、コアの配線基板の表面の配線回路層
を転写法によって形成すると、配線基板表面に前記配線
回路層が埋め込まれるため、銅箔の厚さ分の突起がなく
なり、ビルドアップ層の形成時に気泡の巻き込み等がな
く、良好な多層配線基板が得られる。Further, when the wiring circuit layer on the surface of the core wiring board is formed by a transfer method, the wiring circuit layer is embedded in the wiring board surface, so that there is no protrusion corresponding to the thickness of the copper foil, and the build-up layer is formed. A good multilayer wiring board can be obtained without bubbles or the like during formation.
【0033】次に、本発明の多層配線基板を製造する方
法について説明する。Next, a method for manufacturing the multilayer wiring board of the present invention will be described.
【0034】先ず、少なくとも2種類の有機樹脂を含む
絶縁層の所定箇所にスルーホールを形成するが、該スル
ーホールは未硬化の状態(Bステージ状態)の絶縁層に
対して、パンチングあるいはレーザー等により形成し、
そのスルーホール径は配線回路により適宜選択され、1
00〜200μmの径で形成される。First, through holes are formed at predetermined positions in an insulating layer containing at least two kinds of organic resins. The through holes are formed by punching, laser or the like on the uncured (B-stage) insulating layer. Formed by
The diameter of the through hole is appropriately selected depending on the wiring circuit.
It is formed with a diameter of 00 to 200 μm.
【0035】次に、前記スルーホール内に金属ペースト
を充填して乾燥し、スルーホール導体を形成する。Next, a metal paste is filled in the through-hole and dried to form a through-hole conductor.
【0036】前記金属ペーストは、金属粉末、有機樹脂
及び溶剤から成り、金属粉末としては、銅(Cu)やア
ルミニウム(Al)、金(Au)、銀(Ag)から選ば
れる少なくとも1種又はそれらの合金によって構成する
のが望ましい。The metal paste is composed of a metal powder, an organic resin and a solvent, and the metal powder is at least one selected from copper (Cu), aluminum (Al), gold (Au), silver (Ag) or a mixture thereof. It is desirable to constitute with the alloy of.
【0037】一方、前記金属ペースト中の有機樹脂とし
ては、前述した熱硬化性樹脂の他、セルロース等の樹脂
も使用でき、また、溶剤としては使用する有機樹脂が溶
解可能な溶剤であればいずれでも良く、例えば、イソプ
ロピルアルコールやテルピネオール、2−オクタノー
ル、ブチルカルビトールアセテート(BCA)等が挙げ
られる。On the other hand, as the organic resin in the metal paste, a resin such as cellulose can be used in addition to the above-described thermosetting resin, and any solvent can be used as long as the organic resin used can be dissolved. For example, isopropyl alcohol, terpineol, 2-octanol, butyl carbitol acetate (BCA) and the like can be mentioned.
【0038】次いで、スルーホール導体の絶縁層におけ
る少なくとも一方の露出端部に金属箔から成る配線回路
層を形成する。Next, a wiring circuit layer made of metal foil is formed on at least one exposed end of the insulating layer of the through-hole conductor.
【0039】前記金属箔から成る配線回路層は、周知の
方法によって形成でき、例えば、絶縁層の表面に銅等の
金属箔を接着した後、これを配線パターンにレジストを
塗布して非レジスト形成部をエッチング除去した後、残
留したレジストを除去する方法や、銅箔が接着された転
写シートに対して前記同様にして配線パターンを形成し
た後、これを絶縁層に転写させる方法等が採用し得る。The wiring circuit layer made of the metal foil can be formed by a known method. For example, after a metal foil such as copper is adhered to the surface of the insulating layer, a resist is applied to the wiring pattern to form a non-resist formation. After the portions are removed by etching, a method of removing the remaining resist, a method of forming a wiring pattern on the transfer sheet to which the copper foil is adhered in the same manner as described above, and transferring the wiring pattern to the insulating layer, and the like are employed. obtain.
【0040】そして、スルーホール導体の両端部に形成
された配線回路層間に圧力を印加して、配線回路層を絶
縁層内に埋め込むと同時に、スルーホール導体を加圧圧
縮させるが、この時に印加する圧力は密着性と界面の気
泡を除去する点から、1〜200kg/cm2 の加圧力
が好ましく、より望ましくは20〜70kg/cm2の
範囲となる。Then, a pressure is applied between the wiring circuit layers formed at both ends of the through-hole conductor to embed the wiring circuit layer in the insulating layer and, at the same time, pressurize and compress the through-hole conductor. The pressure to be applied is preferably from 1 to 200 kg / cm 2 , more preferably from 20 to 70 kg / cm 2 , from the viewpoint of adhesion and removing bubbles at the interface.
【0041】また、配線回路層を絶縁層に転写して形成
する場合には、圧力を印加して配線回路層のみを絶縁層
に転写した後、真空プレス機等の装置を用い、積層圧力
を20〜60kg/cm2 に設定して積層圧着するが、
該積層圧着では樹脂の硬化温度以下の範囲で加熱しても
良い。When the wiring circuit layer is formed by transferring the wiring circuit layer to the insulating layer, a pressure is applied to transfer only the wiring circuit layer to the insulating layer, and then the laminating pressure is reduced by using a device such as a vacuum press. It is set to 20-60 kg / cm 2 and laminated and crimped.
In the lamination and pressure bonding, the resin may be heated in a range not higher than the curing temperature of the resin.
【0042】積層圧着後、真空プレス機から取り出し
て、絶縁層を成す前記樹脂を硬化させるが、硬化の際の
最高保持温度は一般的には前記樹脂がエポキシ樹脂の場
合、150〜170℃、ビスマレイミドトリアジン樹脂
では170〜200℃、イミド樹脂では200〜350
℃であり、含有する樹脂の硬化温度に応じてそれぞれの
温度付近で30分〜3時間の保持を行う。After lamination and pressure bonding, the resin is taken out of the vacuum press and cured to form the insulating layer. The maximum holding temperature during curing is generally 150 to 170 ° C. when the resin is an epoxy resin. 170-200 ° C for bismaleimide triazine resin, 200-350 for imide resin
° C, and is maintained for about 30 minutes to 3 hours at each temperature depending on the curing temperature of the contained resin.
【0043】以上の工程を経て、本発明のコアを成す配
線基板が完成する。Through the above steps, the wiring substrate constituting the core of the present invention is completed.
【0044】尚、かかる配線基板には、その後、所望に
より表面の導体に凹凸を形成しても良く、そのためには
少なくとも硫酸あるいは塩酸、所望により過酸化水素を
含んだエッチング液を前記配線基板にスプレーし、導体
金属の粒界を選択的にエッチングすれば良い。Incidentally, the wiring substrate may be provided with irregularities on the surface conductor, if desired. For this purpose, an etching solution containing at least sulfuric acid or hydrochloric acid and, if desired, hydrogen peroxide is applied to the wiring substrate. It is sufficient to spray and selectively etch the grain boundaries of the conductive metal.
【0045】これにより、前記配線回路層表面がエッチ
ングによって表面粗さを0.1μm以上に粗くすること
が可能となり、かつ配線基板の絶縁層を成す樹脂表面よ
りも0.1μm以上窪ませることができ、これらによっ
てビルドアップ法で形成した絶縁膜や配線回路膜とコア
の配線基板との剥離を解消することが可能となる。This makes it possible to roughen the surface of the wiring circuit layer by etching to a surface roughness of 0.1 μm or more and to make the surface of the wiring circuit layer depressed by 0.1 μm or more from the resin surface forming the insulating layer of the wiring board. Accordingly, it is possible to eliminate the peeling of the core and the wiring substrate from the insulating film or the wiring circuit film formed by the build-up method.
【0046】その後、ビルドアップ法により前記コアの
配線基板表面に絶縁膜と配線回路膜を形成するが、その
形成には公知の方法を用いることができ、例えば、感光
性エポキシ樹脂を用いる場合には、絶縁膜を形成した
後、バイアホールを形成する部分の感光性エポキシ樹脂
を露光、現像して取り除き、絶縁膜上に無電解メッキ法
や電解メッキ法によって銅被覆層を形成してバイアホー
ル導体を設けると共に、形成した銅被覆層をエツチング
することにより配線回路膜を形成すれば良い。Thereafter, an insulating film and a wiring circuit film are formed on the wiring substrate surface of the core by a build-up method. A known method can be used for the formation. For example, when a photosensitive epoxy resin is used, After the insulating film is formed, the photosensitive epoxy resin at the portion where the via hole is to be formed is exposed, developed and removed, and a copper coating layer is formed on the insulating film by electroless plating or electrolytic plating to form the via hole. The wiring circuit film may be formed by providing a conductor and etching the formed copper coating layer.
【0047】尚、前記配線回路膜の形成には、サブトラ
クティブ法及びアディティブ法のいずれもが適用でき、
樹脂付き銅箔を積層して形成する場合には、前記コアの
配線基板に樹脂付き銅箔を真空積層機で密着させた後、
フォトレジストで配線回路の露光現像を行い、レーザー
でバイアホールを形成後、メッキによってバイアホール
の導通をとる。In addition, both the subtractive method and the additive method can be applied to the formation of the wiring circuit film.
In the case of forming by laminating copper foil with resin, after bonding the copper foil with resin to the wiring board of the core with a vacuum laminating machine,
The wiring circuit is exposed and developed with a photoresist, and a via hole is formed with a laser, and then the via hole is conducted by plating.
【0048】ここで、前記樹脂付き銅箔を積層する場合
には、樹脂付き銅箔とコアの配線基板との間に空気が残
らないようにコアの配線基板の配線回路層の前記窪みは
3μm以下とするのが良い。Here, when laminating the copper foil with resin, the depression of the wiring circuit layer of the wiring board of the core is 3 μm so that no air remains between the copper foil with resin and the wiring board of the core. It is better to do the following.
【0049】かくして、本発明の多層配線基板を得るこ
とができる。Thus, the multilayer wiring board of the present invention can be obtained.
【0050】[0050]
【実施例】本発明の多層配線基板を以下のようにして評
価した。EXAMPLES The multilayer wiring board of the present invention was evaluated as follows.
【0051】先ず、コアを構成する絶縁層として、表1
に示すような分子量と硬化温度を有する低分子のイミド
樹脂を主成分とし、副成分として高分子のポリマー成
分、更に所望によりセラミック粉末として平均粒径が2
μmのシリカ(SiO2 )粉末を所定量配合し、それに
有機溶剤を添加混合しドクターブレード法でグリーンシ
ートを成形した。First, as an insulating layer constituting the core, Table 1
The main component is a low-molecular-weight imide resin having a molecular weight and a curing temperature as shown in (1), a high-molecular-weight polymer component as an auxiliary component, and a ceramic powder having an average particle size of 2 if desired.
A predetermined amount of μm silica (SiO 2 ) powder was blended, an organic solvent was added and mixed, and a green sheet was formed by a doctor blade method.
【0052】[0052]
【表1】 [Table 1]
【0053】次に、得られたグリーンシートに炭酸ガス
レーザーにより直径0.1mmのバイアホールを形成
し、該バイアホール内に粒径約5μmの銀をメッキした
銅粉末から成る銅ペーストを充填した。Next, a via hole having a diameter of 0.1 mm was formed in the obtained green sheet by a carbon dioxide laser, and the via hole was filled with a copper paste made of copper powder plated with silver having a particle size of about 5 μm. .
【0054】一方、ポリエチレンテレフタレート(PE
T)樹脂から成る転写シートの表面に接着剤を塗布して
粘着性を付与し、厚さ18μmの銅箔を一面に接着した
後、フォトレジスト(ドライフィルム)を塗布して露光
現像を行った後、これを塩化第二鉄溶液中に浸漬して非
パターン部をエッチング除去し、線幅が40μm、配線
間の間隔が40μmの配線回路を形成した。On the other hand, polyethylene terephthalate (PE)
T) An adhesive was applied to the surface of a transfer sheet made of a resin to impart tackiness, a copper foil having a thickness of 18 μm was adhered to one surface, and then a photoresist (dry film) was applied and exposed and developed. Thereafter, this was immersed in a ferric chloride solution to remove the non-pattern portion by etching, thereby forming a wiring circuit having a line width of 40 μm and an interval between the wirings of 40 μm.
【0055】そして、前記グリーンシートに配線回路を
形成した転写シートを位置決めして密着させ、該転写シ
ートのみを剥離して配線回路をグリーンシート表面に転
写した。Then, the transfer sheet having the wiring circuit formed thereon was positioned and brought into close contact with the green sheet, and only the transfer sheet was peeled off to transfer the wiring circuit to the surface of the green sheet.
【0056】また、前記同様にしてコアの配線基板を作
製するに必要な各層を形成し、それらを積層して20k
g/cm2 の圧力で圧着した後、140℃の温度で1時
間加熱して一部硬化させ、引き続いて200℃の温度で
1時間加熱して完全硬化させてコアの配線基板を作製し
た。Also, in the same manner as described above, each layer necessary for fabricating the core wiring board is formed,
After press-bonding at a pressure of g / cm 2 , heating was performed at a temperature of 140 ° C. for 1 hour to partially cure, and subsequently, heating was performed at a temperature of 200 ° C. for 1 hour to completely cure to produce a core wiring substrate.
【0057】かくして得られた配線基板について、その
表面の絶縁層の表面粗さを測定した。The surface roughness of the insulating layer on the surface of the wiring board thus obtained was measured.
【0058】続いて、感光性エポキシ樹脂をスピンコー
ト法により前記配線基板の表面に塗布した後、所定温度
で加熱して絶縁膜を形成し、バイアホールを形成する部
分の感光性エポキシ樹脂を露光、現像して取り除いた。Subsequently, a photosensitive epoxy resin is applied to the surface of the wiring substrate by a spin coating method, and then heated at a predetermined temperature to form an insulating film, and a portion of the photosensitive epoxy resin where a via hole is to be formed is exposed. , Developed and removed.
【0059】その後、前記絶縁膜の表面及びバイアホー
ル内に無電解メッキ法や電解メッキ法により銅被覆層を
形成し、該銅被覆層をエツチングすることにより配線回
路膜とバイアホール導体を形成した。Thereafter, a copper coating layer was formed on the surface of the insulating film and the inside of the via hole by an electroless plating method or an electrolytic plating method, and the wiring circuit film and the via hole conductor were formed by etching the copper coating layer. .
【0060】そして、前記同様の工程を繰り返して所定
の感光性樹脂による絶縁膜と、配線回路膜及びバイアホ
ール導体から成るビルドアップ層を形成した後、配線回
路膜を保護するエポキシ樹脂から成るソルダーレジスト
を設けて評価用の多層配線基板を作製した。After the same steps are repeated to form an insulating film of a predetermined photosensitive resin and a build-up layer composed of a wiring circuit film and a via-hole conductor, a solder made of epoxy resin for protecting the wiring circuit film is formed. A multilayer wiring board for evaluation was prepared by providing a resist.
【0061】かくして得られた評価用の多層配線基板に
ついて、ビルドアップ層の銅配線に金具を取り付け、該
銅配線を引き剥がすときに必要な力を測定して、配線の
密着強度を求めて密着性を評価した。With respect to the multilayer wiring board for evaluation thus obtained, a metal fitting is attached to the copper wiring of the build-up layer, the force required for peeling off the copper wiring is measured, and the adhesion strength of the wiring is determined. The sex was evaluated.
【0062】一方、前記評価用の多層配線基板を−60
℃と+150℃の温度でヒートサイクル試験を200サ
イクル行い、試験後のビルドアップ層の剥離やクラック
等の不良の有無を確認した。On the other hand, the multilayer wiring board for evaluation was -60
A heat cycle test was performed 200 times at a temperature of 150 ° C. and a temperature of + 150 ° C., and the presence or absence of defects such as peeling or cracking of the build-up layer after the test was confirmed.
【0063】尚、前記評価用の多層配線基板を切断し、
断面における配線回路膜やバイアホール導体の形成付近
を観察したところ、コアの配線基板の変形や、配線回路
膜、バイアホール導体等の接続不良、配線の断線等の不
良はいずれも認められなかった。The multilayer wiring board for evaluation was cut, and
Observation of the vicinity of the formation of the wiring circuit film and the via-hole conductor in the cross section revealed that neither deformation of the wiring substrate of the core, connection failure of the wiring circuit film, the via-hole conductor, or disconnection of the wiring was found. .
【0064】また、前記評価用の多層配線基板を湿度8
5%、温度85℃の高温多湿雰囲気に100時間放置し
たが、本発明の多層配線基板ではいずれも目視で判別で
きる程度の変化は生じておらず、1000時間放置後に
周辺部にわずかな層の剥離が認められたが、動作には全
く影響のないことを確認した。Further, the multilayer wiring board for evaluation was subjected to a humidity of 8
After being left for 100 hours in a high-temperature and high-humidity atmosphere of 5% and a temperature of 85 ° C., the multilayer wiring board of the present invention did not show any change that could be visually discriminated. Peeling was observed, but it was confirmed that there was no effect on operation.
【0065】[0065]
【表2】 [Table 2]
【0066】表から明らかなように、本発明の請求範囲
外である試料番号1、5、14では表面粗さが0.07
μm以下となってビルドアップ層の密着力が弱く、いず
れもヒートサイクル試験で剥離したり、クラックを生じ
たりしているのに対して、本発明ではいずれも密着力が
改善されてヒートサイクル試験でも不良は発生していな
いことが確認できた。As is clear from the table, the surface roughness of Sample Nos. 1, 5, and 14, which are out of the claims of the present invention, is 0.07.
μm or less, the adhesive strength of the build-up layer is weak, and all of them are peeled off or cracked in the heat cycle test, whereas in the present invention, the adhesive strength is improved in any of the heat cycle tests. However, it was confirmed that no defect occurred.
【0067】[0067]
【発明の効果】以上、詳述したように、本発明ではビル
ドアップ法により作製する多層配線基板のコアを成す配
線基板の絶縁層を、少なくとも2種類の分子量及び/又
は硬化温度が異なる樹脂で形成したことから、ビルドア
ップ法で形成した絶縁膜や配線回路膜とコアを成す配線
基板の絶縁層との密着力が向上し、情報通信分野、特に
モバイルコンピューティング関連機器の配線基板として
最適な、配線の高密度化と低コスト化を実現した多層配
線基板を得ることができる。As described above in detail, in the present invention, the insulating layer of the wiring board which forms the core of the multilayer wiring board manufactured by the build-up method is made of at least two kinds of resins having different molecular weights and / or curing temperatures. As a result, the adhesion between the insulating film and wiring circuit film formed by the build-up method and the insulating layer of the wiring substrate that forms the core is improved, making it ideal for use in the information and communication field, especially as a wiring substrate for mobile computing-related equipment. In addition, it is possible to obtain a multilayer wiring board that realizes higher density wiring and lower cost.
【図1】本発明の多層配線基板の一実施例を示す断面図
である。FIG. 1 is a sectional view showing one embodiment of a multilayer wiring board of the present invention.
1 多層配線基板 2 絶縁層 3 配線回路層 4 コア 5 絶縁膜 6 配線回路膜 DESCRIPTION OF SYMBOLS 1 Multilayer wiring board 2 Insulating layer 3 Wiring circuit layer 4 Core 5 Insulating film 6 Wiring circuit film
Claims (4)
とも2種類の樹脂から成る絶縁層と、配線回路層とから
成り、該絶縁層の表面粗さが0.1μm以上である配線
基板をコアとし、該配線基板の表面に絶縁膜と配線回路
膜を順次積層して成ることを特徴とする多層配線基板。1. A wiring substrate comprising an insulating layer made of at least two kinds of resins having different molecular weights and / or curing temperatures, and a wiring circuit layer, wherein the insulating layer has a surface roughness of 0.1 μm or more. A multilayer wiring board comprising an insulating film and a wiring circuit film sequentially laminated on the surface of the wiring board.
化温度が10℃以上異なることを特徴とする請求項1に
記載の多層配線基板。2. The multilayer wiring board according to claim 1, wherein the molecular weight of the resin is at least 5 times and / or the curing temperature is different by at least 10 ° C.
μmの平均粒径を有するセラミック粉末を10〜50体
積%含有することを特徴とする請求項1又は請求項2の
いずれかに記載の多層配線基板。3. The core according to claim 2, wherein the insulating layer comprises 0.2 to 10%.
3. The multilayer wiring board according to claim 1, comprising 10 to 50% by volume of a ceramic powder having an average particle size of [mu] m.
層が樹脂フィルム上に作製した配線導体層を転写して形
成されて成ることを特徴とする請求項1に記載の多層配
線基板。4. The multilayer wiring board according to claim 1, wherein the wiring circuit layer on at least the surface of the wiring board is formed by transferring a wiring conductor layer formed on a resin film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23463797A JPH1174641A (en) | 1997-08-29 | 1997-08-29 | Multilayer wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23463797A JPH1174641A (en) | 1997-08-29 | 1997-08-29 | Multilayer wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1174641A true JPH1174641A (en) | 1999-03-16 |
Family
ID=16974160
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23463797A Pending JPH1174641A (en) | 1997-08-29 | 1997-08-29 | Multilayer wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH1174641A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7629045B2 (en) | 2004-01-30 | 2009-12-08 | Hitachi Chemical Company, Ltd. | Adhesion assisting agent-bearing metal foil, printed wiring board, and production method of printed wiring board |
JP2009302554A (en) * | 2009-08-12 | 2009-12-24 | Sumitomo Bakelite Co Ltd | Prepreg with metal foil, laminate sheet, and interposer |
US8222527B2 (en) | 2005-08-29 | 2012-07-17 | Shinko Electric Industries Co., Ltd. | Multilayered wiring board and method for fabricating the same |
JP2012186442A (en) * | 2011-02-15 | 2012-09-27 | Ngk Spark Plug Co Ltd | Manufacturing method of multilayer wiring board |
-
1997
- 1997-08-29 JP JP23463797A patent/JPH1174641A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7629045B2 (en) | 2004-01-30 | 2009-12-08 | Hitachi Chemical Company, Ltd. | Adhesion assisting agent-bearing metal foil, printed wiring board, and production method of printed wiring board |
US7862889B2 (en) | 2004-01-30 | 2011-01-04 | Hitachi Chemical Co., Ltd. | Adhesion assisting agent-bearing metal foil, printed wiring board, and production method of printed wiring board |
US8815334B2 (en) | 2004-01-30 | 2014-08-26 | Hitachi Chemical Co., Ltd. | Adhesion assisting agent-bearing metal foil, printed wiring board, and production method of printed wiring board |
US8222527B2 (en) | 2005-08-29 | 2012-07-17 | Shinko Electric Industries Co., Ltd. | Multilayered wiring board and method for fabricating the same |
KR101319358B1 (en) * | 2005-08-29 | 2013-10-16 | 신꼬오덴기 고교 가부시키가이샤 | Multilayered wiring board and method for fabricating the same |
US9040836B2 (en) | 2005-08-29 | 2015-05-26 | Shinko Electric Industries Co., Ltd. | Multilayered wiring board and method for fabricating the same |
JP2009302554A (en) * | 2009-08-12 | 2009-12-24 | Sumitomo Bakelite Co Ltd | Prepreg with metal foil, laminate sheet, and interposer |
JP2012186442A (en) * | 2011-02-15 | 2012-09-27 | Ngk Spark Plug Co Ltd | Manufacturing method of multilayer wiring board |
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