JPH116865A - インターフェイス回路、試験装置及び信号入力方法 - Google Patents

インターフェイス回路、試験装置及び信号入力方法

Info

Publication number
JPH116865A
JPH116865A JP10088797A JP8879798A JPH116865A JP H116865 A JPH116865 A JP H116865A JP 10088797 A JP10088797 A JP 10088797A JP 8879798 A JP8879798 A JP 8879798A JP H116865 A JPH116865 A JP H116865A
Authority
JP
Japan
Prior art keywords
voltage
test
transistor
current
interface circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10088797A
Other languages
English (en)
Japanese (ja)
Other versions
JPH116865A5 (enExample
Inventor
Joseph Hani Hassoun
ジョセフ・ハニ・ハスーン
James A Gasbarro
ジェイムス・エー・ガスバロ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH116865A publication Critical patent/JPH116865A/ja
Publication of JPH116865A5 publication Critical patent/JPH116865A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31924—Voltage or current aspects, e.g. driver, receiver
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP10088797A 1997-04-04 1998-04-01 インターフェイス回路、試験装置及び信号入力方法 Pending JPH116865A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/833,412 US5844913A (en) 1997-04-04 1997-04-04 Current mode interface circuitry for an IC test device
US833,412 1997-04-04

Publications (2)

Publication Number Publication Date
JPH116865A true JPH116865A (ja) 1999-01-12
JPH116865A5 JPH116865A5 (enExample) 2005-06-02

Family

ID=25264342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10088797A Pending JPH116865A (ja) 1997-04-04 1998-04-01 インターフェイス回路、試験装置及び信号入力方法

Country Status (3)

Country Link
US (1) US5844913A (enExample)
JP (1) JPH116865A (enExample)
KR (1) KR19980081092A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008525803A (ja) * 2004-12-23 2008-07-17 テラダイン・インコーポレーテッド 高電圧機能を備えたピンエレクトロニクス
JP2009503500A (ja) * 2005-07-29 2009-01-29 テラダイン・インコーポレーテッド プログラマブルピンエレクトロニクスドライバ
JP2012109738A (ja) * 2010-11-16 2012-06-07 Shindengen Electric Mfg Co Ltd 高圧パルス発生装置

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10223000A (ja) * 1997-02-04 1998-08-21 Mitsubishi Electric Corp 半導体記憶装置
US6289292B1 (en) * 1997-10-28 2001-09-11 Micron Technology, Inc. System for identifying a component with physical characterization
US6161052A (en) * 1997-10-28 2000-12-12 Micron Electronics, Inc. Method for identifying a component with physical characterization
US6028438A (en) * 1997-10-31 2000-02-22 Credence Systems Corporation Current sense circuit
US6064224A (en) * 1998-07-31 2000-05-16 Hewlett--Packard Company Calibration sharing for CMOS output driver
US6324485B1 (en) * 1999-01-26 2001-11-27 Newmillennia Solutions, Inc. Application specific automated test equipment system for testing integrated circuit devices in a native environment
US6546507B1 (en) 1999-08-31 2003-04-08 Sun Microsystems, Inc. Method and apparatus for operational envelope testing of busses to identify halt limits
US6502212B1 (en) * 1999-08-31 2002-12-31 Sun Microsystems, Inc. Method and apparatus for bus parameter optimization using probes of system configurations
US6609221B1 (en) 1999-08-31 2003-08-19 Sun Microsystems, Inc. Method and apparatus for inducing bus saturation during operational testing of busses using a pattern generator
KR100723463B1 (ko) * 1999-12-24 2007-05-30 삼성전자주식회사 디지털 가변 저항 및 이를 구비하는 디지털 위상 합성기
US6292010B1 (en) 2000-02-02 2001-09-18 Teradyne, Inc. Dynamic pin driver combining high voltage mode and high speed mode
US6760857B1 (en) * 2000-02-18 2004-07-06 Rambus Inc. System having both externally and internally generated clock signals being asserted on the same clock pin in normal and test modes of operation respectively
US6545522B2 (en) * 2001-05-17 2003-04-08 Intel Corporation Apparatus and method to provide a single reference component for multiple circuit compensation using digital impedance code shifting
US6982587B2 (en) * 2002-07-12 2006-01-03 Rambus Inc. Equalizing transceiver with reduced parasitic capacitance
KR100532447B1 (ko) * 2003-07-11 2005-11-30 삼성전자주식회사 높은 테스트 전류 주입이 가능한 집적 회로 소자의 병렬테스트 장치 및 방법
KR100690275B1 (ko) * 2006-01-31 2007-03-12 삼성전자주식회사 테스트 모드에서 전압모드로 동작하는 전류모드 반도체집적회로장치
JP4670783B2 (ja) * 2006-09-28 2011-04-13 横河電機株式会社 半導体試験装置
DE102006051135B4 (de) * 2006-10-30 2016-11-17 Polaris Innovations Ltd. Test-Verfahren, sowie Halbleiter-Bauelement, insbesondere Daten-Zwischenspeicher-Bauelement
US7848899B2 (en) * 2008-06-09 2010-12-07 Kingtiger Technology (Canada) Inc. Systems and methods for testing integrated circuit devices
US7928716B2 (en) * 2008-12-30 2011-04-19 Intel Corporation Power supply modulation
US8356215B2 (en) * 2010-01-19 2013-01-15 Kingtiger Technology (Canada) Inc. Testing apparatus and method for analyzing a memory module operating within an application system
US8724408B2 (en) 2011-11-29 2014-05-13 Kingtiger Technology (Canada) Inc. Systems and methods for testing and assembling memory modules
US9117552B2 (en) 2012-08-28 2015-08-25 Kingtiger Technology(Canada), Inc. Systems and methods for testing memory
US8872546B2 (en) 2012-09-13 2014-10-28 Intel Corporation Interface circuitry for a test apparatus
WO2016044849A1 (en) * 2014-09-19 2016-03-24 Elevate Semiconductor, Inc. Parametric pin measurement unit high voltage extension
KR20160104845A (ko) * 2015-02-26 2016-09-06 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
US11320480B1 (en) * 2016-01-22 2022-05-03 Albert Gaoiran Scalable tester for testing multiple devices under test
US10831938B1 (en) * 2019-08-14 2020-11-10 International Business Machines Corporation Parallel power down processing of integrated circuit design
KR20230030436A (ko) * 2021-08-25 2023-03-06 삼성전자주식회사 모니터링 회로, 모니터링 회로를 포함하는 집적 회로 및 모니터링 회로의 동작 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0750159B2 (ja) * 1985-10-11 1995-05-31 株式会社日立製作所 テストパタ−ン発生装置
FR2594553B1 (fr) * 1985-10-16 1989-02-03 Bendix Electronics Sa Interface de test pour circuit integre en technologie mos
JPH04177700A (ja) * 1990-11-13 1992-06-24 Toshiba Corp メモリ不良解析装置
US5101153A (en) * 1991-01-09 1992-03-31 National Semiconductor Corporation Pin electronics test circuit for IC device testing
US5498990A (en) * 1991-11-05 1996-03-12 Monolithic System Technology, Inc. Reduced CMOS-swing clamping circuit for bus lines
US5250854A (en) * 1991-11-19 1993-10-05 Integrated Device Technology, Inc. Bitline pull-up circuit operable in a low-resistance test mode
US5355391A (en) * 1992-03-06 1994-10-11 Rambus, Inc. High speed bus system
US5254883A (en) * 1992-04-22 1993-10-19 Rambus, Inc. Electrical current source circuitry for a bus
US5268639A (en) * 1992-06-05 1993-12-07 Rambus, Inc. Testing timing parameters of high speed integrated circuit devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008525803A (ja) * 2004-12-23 2008-07-17 テラダイン・インコーポレーテッド 高電圧機能を備えたピンエレクトロニクス
JP2009503500A (ja) * 2005-07-29 2009-01-29 テラダイン・インコーポレーテッド プログラマブルピンエレクトロニクスドライバ
JP2012109738A (ja) * 2010-11-16 2012-06-07 Shindengen Electric Mfg Co Ltd 高圧パルス発生装置

Also Published As

Publication number Publication date
KR19980081092A (ko) 1998-11-25
US5844913A (en) 1998-12-01

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